For the Inventor, By the Inventor

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San Jose, CA, United States of America

Magepower Semiconductor Corp.

USPTO Granted Patents = 14

Forward Citations = 660

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9 inventors (with patents filed for the assignee):

Fwu-Iuan Hshieh (13 out of 142 patents)

Koon Chong So (3 out of 67 patents)

Yan Man Tsui (2 out of 29 patents)

4. Danny Chi Nim (2 out of 12 patents)

5. True-Lon Lin (1 out of 19 patents)

6. Chanh Ly (1 out of 1 patent)

7. David Haksung Koh (1 out of 1 patent)

8. Shang-Lin Weng (1 out of 2 patents)

9. Kong Chong So (1 out of 2 patents)

14 patents: Sort by Forward Citations

1. 6426260 - Switching speed improvement in DMO by implanting lightly doped region under gate (2002-07-30),

2. 6404025 - MOSFET power device manufactured with reduced number of masks by fabrication simplified processes (2002-06-11),

3. 6262453 - Double gate-oxide for reducing gate-drain capacitance in trenched DMOS with high-dopant concentration buried-region under trenched gate (2001-07-17),

4. 6172398 - Trenched DMOS device provided with body-dopant redistribution-compensation region for preventing punch through and adjusting threshold voltage (2001-01-09),

5. 6051468 - Method of forming a semiconductor structure with uniform threshold (2000-04-18),

6. 6049104 - MOSFET device to reduce gate-width without increasing JFET resistance (2000-04-11),

7. 6048759 - Gate/drain capacitance reduction for double gate-oxide DMOS without (2000-04-11),

8. 6031265 - Enhancing DMOS device ruggedness by reducing transistor parasitic (2000-02-29),

9. 6005271 - Semiconductor cell array with high packing density (1999-12-21),

10. 5998266 - Method of forming a semiconductor structure having laterally merged body (1999-12-07),

11. 5973361 - DMOS transistors with diffusion merged body regions manufactured with (1999-10-26),

12. 5907776 - Method of forming a semiconductor structure having reduced threshold (1999-05-25),

13. 5894150 - Cell density improvement in planar DMOS with farther-spaced body regions (1999-04-13),

14. 5844277 - Power MOSFETs and cell topology (1998-12-01),

Magepower Semiconductor Corp. is a leading provider of power management solutions for various industries. With a focus on innovation and technology, Magepower offers cutting-edge semiconductor products that are designed to optimize power efficiency and performance. The company is committed to delivering reliable and cost-effective solutions to its customers to meet their specific needs and requirements.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Dec 30 2025

14 Patents

#409 in San Jose, CA

#5,156 in California

#21,640 in US

#40,937 in the World

San Jose, CA, United States of America

Magepower Semiconductor Corp.

Forward Citations = 660

9 inventors:

Fwu-Iuan Hshieh (13 out of 142 patents)

Koon Chong So (3 out of 67 patents)

Yan Man Tsui (2 out of 29 patents)

4. Danny Chi Nim (2 out of 12 patents)

5. True-Lon Lin (1 out of 19 patents)

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