The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 1999

Filed:

Nov. 05, 1997
Applicant:
Inventor:

Fwu-Iuan Hshieh, Saratoga, CA (US);

Assignee:

MagePower Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257341 ; 257331 ; 257401 ;
Abstract

A MOSFET (Metal Oxide Semiconductor Field Effect Transistors) cell array formed on a semiconductor substrate includes a major surface formed with a plurality of MOSFET cells. Each semiconductor cell in the cell array is geometrically configured with a base portion and a plurality of protruding portions extending from the base portion. The base and protruding portions define a closed cell boundary enclosing each semiconductor cell. The closed cell boundary of each semiconductor cell is disposed on the major surface proximal to and in geometrical accord with the corresponding cell boundaries of other adjacent semiconductor cells in the cell array. As arranged, the cell boundary and thus the channel width of each cell is extended without any concomitant reduction in cell area.


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