For the Inventor, By the Inventor

Enter assignee name

Hsinchu, Taiwan

Elite Semiconductor Memory Technology, Inc

USPTO Granted Patents = 175

% Expired Patents = 3.4

Trademarks = 4

Forward Citations = 729

Loading Chart...

Loading Chart...

92 inventors (with patents filed for the assignee):

Chung Zen Chen (22 out of 25 patents)

Min-Chung Chou (20 out of 21 patents)

Chung-Zen Chen (19 out of 44 patents)

4. Ming-Chien Huang (7 out of 17 patents)

5. Jen-Shou Hsu (7 out of 18 patents)

6. Chien-Yi Chang (6 out of 7 patents)

7. Tse-Hua Yao (6 out of 8 patents)

8. Jian-Sing Liou (6 out of 6 patents)

9. Chung-Shan Kuo (5 out of 12 patents)

10. Ming-Sheng Tung (5 out of 9 patents)

11. Chih-Hao Chen (5 out of 35 patents)

12. Yi-Fan Chen (4 out of 30 patents)

13. Szu-Chun Tsao (4 out of 23 patents)

14. Min Chung Chou (4 out of 4 patents)

15. Yi-Heng Liu (4 out of 4 patents)

Core Competencies:

Non-Volatile Memory

Voltage Regulator

Error Correction

Transient Response

Memory Controller

Power Management

Refresh Mechanism

E-Fuse Circuit

Flash Memory

Synchronization Circuit

Testing Apparatus

Amplifier Circuit

175 patents: Sort by Forward Citations

1. 11277066 - Control circuit for facilitating inrush current reduction for a voltage regulator and a voltage regulation apparatus with inrush current reduction (2022-03-15),

2. 11209850 - Termination voltage regulation apparatus with transient response enhancement (2021-12-28),

3. 11119854 - Method of controlling verification operations for error correction of non-volatile memory device, and non-volatile memory device (2021-09-14),

4. 11119671 - Method for facilitating a memory system operable in advance during power-up, memory controller therefor, and memory system capable of being operable in advance during power-up (2021-09-14),

5. 11095221 - Constant on-time controller and buck regulator device using the same (2021-08-17),

6. 11087853 - Power-on over-erasure correction method and memory device utilizing same (2021-08-10),

7. 11080183 - Memory chip, memory module and method for pseudo-accessing memory bank thereof (2021-08-03),

8. 11073862 - Synchronization circuit and cascaded synchronization circuit for converting asynchronous signal into synchronous signal (2021-07-27),

9. 11070178 - Class D power amplifier (2021-07-20),

10. 11063511 - Valley-fill PFC circuit with EMI protection (2021-07-13),

11. 10985157 - Electrostatic discharge protection device and layout design thereof (2021-04-20),

12. 10958259 - Pulse width modulation output stage with dead time control (2021-03-23),

13. 10916293 - Target row refresh mechanism capable of effectively determining target row address to effectively mitigate row hammer errors without using counter circuit (2021-02-09),

14. 10797597 - Transient enhancing circuit and constant-on-time converter using the same (2020-10-06),

15. 10796730 - Semiconductor memory device and word-line activation method (2020-10-06),

Elite Semiconductor Memory Technology, Inc. is a leading innovator in the field of memory device technology, specializing in the development and manufacturing of advanced non-volatile memory solutions. The company focuses on critical technology areas such as voltage regulation, error correction, and power management, ensuring high performance and reliability in its products. Based in Hsinchu, Taiwan, ESMT is dedicated to enhancing memory controller functionalities and optimizing transient response and refresh mechanisms, catering to a diverse range of applications in the semiconductor industry.

Profile summary based on public USPTO records.

Company Badge

USPTO Data Jan 1 1976 - Sep 29 2026

175 Patents

#46 in Hsinchu

#154 in Taiwan

#4,740 in the World

Hsinchu, Taiwan

Elite Semiconductor Memory Technology, Inc

Forward Citations = 729

92 inventors:

Chung Zen Chen (22 out of 25 patents)

Min-Chung Chou (20 out of 21 patents)

Chung-Zen Chen (19 out of 44 patents)

4. Ming-Chien Huang (7 out of 17 patents)

5. Jen-Shou Hsu (7 out of 18 patents)

Please report any incorrect information to [email protected]

Loading…