Method for facilitating a memory system operable in advance during power-up, memory controller therefor, and memory system capable of being operable in advance during power-up

Abstract

A method facilitating a memory system operable in advance during power-up is introduced, including the following. A power-up verification circuit is provided, internally coupled to a memory control circuit of the memory system. During a period of the power-up in which a power voltage signal is ramping but not yet reaching a power voltage threshold, a power-up verification state machine of the power-up verification circuit is activated responsive to a power-on reset signal and the power voltage signal. The activated power-up verification state machine communicates with circuit units of the memory system to enable execution of corresponding detections on the circuit units in accordance with a sequence of states of the power-up verification state machine. After completion of the sequence of states, a verification completion signal is sent to enable the memory control circuit to be powered by the power voltage signal and operable to control the memory system.