Hsinchu, Taiwan

Tse-Hua Yao

This inventor holds 8 USPTO granted patents. Top assignees: Elite Semiconductor Memory Technology, Inc, Elite Semiconductor Microelectronics Technology Inc.. Active years: 2008-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tse-Hua Yao. Retrieved from https://idiyas.com/inventor/tse-hua-yao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.1

ph-index = 3

Forward Citations = 27(Granted Patents)


Location History:

  • Kellung, TW (2008 - 2009)
  • Hsinchu County, TW (2018 - 2020)
  • Zhubei, TW (2021)
  • Hsinchu, TW (2021 - 2022)

Company Filing History:


Years Active: 2008-2022

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8 patents (USPTO):Explore Patents

Title: The Innovations of Tse-Hua Yao

Introduction

Tse-Hua Yao is a prominent inventor based in Hsinchu County, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of eight patents. His work primarily focuses on memory test circuits and E-fuse circuits, showcasing his expertise in electronic design and innovation.

Latest Patents

One of Tse-Hua Yao's latest patents is a memory test circuit. This circuit includes a first latch circuit that receives a first input address and an error indication signal to generate a first address. It also features a first E-fuse group that receives the first address to generate an output address. Additionally, a second latch circuit receives the error indication signal, while a second E-fuse group generates an error indication signal based on the output of the second latch circuit. A comparison circuit activates the second latch circuit based on the relationship between the first address and a second input address, as well as the state of the first latch circuit or the first E-fuse group.

Another notable patent is an E-fuse circuit. This circuit comprises an E-fuse group with multiple E-fuse sections, each containing several E-fuses. It includes a multi-mode latch circuit that generates a first output signal in burn-in mode and a second output signal in normal mode. The first logic circuit group generates a control signal in burn-in mode, while the second logic circuit group uses this control signal to generate a selection signal, determining which E-fuse section is activated.

Career Highlights

Tse-Hua Yao has worked with several notable companies in the semiconductor industry. He has been associated with Elite Semiconductor Memory Technology, Inc. and Elite Semiconductor Microelectronics Technology Inc. His experience in these organizations has allowed him to develop and refine his innovative ideas in semiconductor technology.

Collaborations

Throughout his career, Tse-Hua Yao has collaborated with talented individuals such as Yi-Fan Chen and Min-Chung Chou. These collaborations have contributed to the advancement of technology in their respective fields.

Conclusion

Tse-Hua Yao's contributions to semiconductor technology through his patents and collaborations highlight his role as an influential inventor. His innovative designs in memory test circuits and E-fuse circuits continue to impact the industry positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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