The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2022

Filed:

Nov. 04, 2020
Applicant:

Elite Semiconductor Microelectronics Technology Inc., Hsinchu, TW;

Inventors:

Yu-Tao Lin, Hsinchu, TW;

Tse-Hua Yao, Hsinchu, TW;

Yi-Fan Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/06 (2006.01); G11C 29/38 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 29/38 (2013.01); G06F 3/0619 (2013.01); G06F 3/0653 (2013.01); G06F 3/0673 (2013.01); G11C 8/06 (2013.01);
Abstract

A memory test circuit comprising: a first latch circuit for receiving a first input address and an error indication signal to generate a first address; a first E-fuse group for receiving the first address to generate an output address; a second latch circuit for receiving the error indication signal; a second E-fuse group for generating an error indication signal according to an output of the second latch circuit which is generated according to the fault indication signal; and a comparison circuit for activating the second latch circuit according to a relation between the first address and a second input address and a state of the first latch circuit or the first E-fuse group.


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