The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2025
Filed:
Jun. 25, 2021
Intel Corporation, Santa Clara, CA (US);
Debaleena Nandi, Hillsboro, OR (US);
Cory Bomberger, Portland, OR (US);
Gilbert Dewey, Beaverton, OR (US);
Anand S. Murthy, Portland, OR (US);
Mauro Kobrinsky, Portland, OR (US);
Rushabh Shah, Hillsboro, OR (US);
Chi-Hing Choi, Portland, OR (US);
Harold W. Kennel, Portland, OR (US);
Omair Saadat, Beaverton, OR (US);
Adedapo A. Oni, North Plains, OR (US);
Nazila Haratipour, Portland, OR (US);
Tahir Ghani, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments disclosed herein include semiconductor devices with improved contact resistances. In an embodiment, a semiconductor device comprises a semiconductor channel, a gate stack over the semiconductor channel, a source region on a first end of the semiconductor channel, a drain region on a second end of the semiconductor channel, and contacts over the source region and the drain region. In an embodiment, the contacts comprise a silicon germanium layer, an interface layer over the silicon germanium layer, and a titanium layer over the interface layer.