The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2022
Filed:
Sep. 26, 2018
Intel Corporation, Santa Clara, CA (US);
Seung Hoon Sung, Portland, OR (US);
Justin Weber, Portland, OR (US);
Matthew Metz, Portland, OR (US);
Arnab Sen Gupta, Hillsboro, OR (US);
Abhishek Sharma, Hillsboro, OR (US);
Benjamin Chu-Kung, Portland, OR (US);
Gilbert Dewey, Beaverton, OR (US);
Charles Kuo, Union City, CA (US);
Nazila Haratipour, Hillsboro, OR (US);
Shriram Shivaraman, Hillsboro, OR (US);
Van H. Le, Portland, OR (US);
Tahir Ghani, Portland, OR (US);
Jack T. Kavalieros, Portland, OR (US);
Sean Ma, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments herein describe techniques for a thin-film transistor (TFT) above a substrate. The transistor includes a contact electrode having a conductive material above the substrate, an epitaxial layer above the contact electrode, and a channel layer including a channel material above the epitaxial layer and above the contact electrode. The channel layer is in contact at least partially with the epitaxial layer. A conduction band of the channel material and a conduction band of a material of the epitaxial layer are substantially aligned with an energy level of the conductive material of the contact electrode. A bandgap of the material of the epitaxial layer is smaller than a bandgap of the channel material. Furthermore, a gate electrode is above the channel layer, and separated from the channel layer by a gate dielectric layer. Other embodiments may be described and/or claimed.