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For the Inventor, By the Inventor

Shanghai, China

Zhicheng Ding

USPTO Granted Patents = 17 

Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 13(Granted Patents)


Company Filing History:

goldMedal16 out of 54,750 
 
Intel Corporation
 patents
silverMedal1 out of 1 
 
Shanghai Zhonglian Technologies Ltd., Co
 patent

Years Active: 2019-2024

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17 patents (USPTO):Explore Patents
1. 12027496 - Film in substrate for releasing z stack-up constraint (2024-07-02),
2. 11990395 - Joint connection of corner non-critical to function (NCTF) ball for BGA solder joint reliability (SJR) enhancement (2024-05-21),
3. 11894344 - Power enhanced stacked chip scale package solution with integrated die attach film (2024-02-06),
4. 11848281 - Die stack with reduced warpage (2023-12-19),
5. 11830848 - Electronic device package (2023-11-28),
6. 11742284 - Interconnect structure fabricated using lithographic and deposition processes (2023-08-29),
7. 11538746 - Vertical bond-wire stacked chip-scale package with application-specific integrated circuit die on stack, and methods of making same (2022-12-27),
8. 11302671 - Power enhanced stacked chip scale package solution with integrated die attach film (2022-04-12),
9. 11148044 - Input device for intelligent terminal (2021-10-19),
10. 11101254 - Flip-chip like integrated passive prepackage for SIP device (2021-08-24),
11. 11081451 - Die stack with reduced warpage (2021-08-03),
12. 10991679 - Stair-stacked dice device in a system in package, and methods of making same (2021-04-27),
13. 10930622 - Prepackaged stair-stacked memory module in a chip scale system in package, and methods of making same (2021-02-23),
14. 10910347 - Method, apparatus and system to interconnect packaged integrated circuit dies (2021-02-02),
15. 10770434 - Stair-stacked dice device in a system in package, and methods of making same (2020-09-08),

Title: Zhicheng Ding: Innovator in Semiconductor Packaging

Introduction

Zhicheng Ding is a prominent inventor based in Shanghai, China. He has made significant contributions to the field of semiconductor packaging, holding a total of 17 patents. His innovative work has advanced the technology used in semiconductor devices, making them more efficient and reliable.

Latest Patents

Ding's latest patents include groundbreaking technologies such as "Film in substrate for releasing z stack-up constraint." This invention involves semiconductor packages that feature a package substrate with multiple cavities and adhesives. The design allows for stacked dies to be coupled to the adhesives with spacers, enhancing the overall functionality of the semiconductor package. Another notable patent is "Joint connection of corner non-critical to function (NCTF) ball for BGA solder joint reliability (SJR) enhancement." This patent focuses on improving the reliability of solder joints in semiconductor packages through innovative patterns and conductive pads.

Career Highlights

Throughout his career, Zhicheng Ding has worked with leading companies in the technology sector. He has been associated with Intel Corporation and Shanghai Zhonglian Technologies Ltd., Co. His experience in these organizations has allowed him to refine his skills and contribute to cutting-edge semiconductor technologies.

Collaborations

Ding has collaborated with notable professionals in his field, including Yong She and Bin Liu. These partnerships have fostered innovation and have led to the development of advanced semiconductor packaging solutions.

Conclusion

Zhicheng Ding's contributions to semiconductor packaging technology are noteworthy and impactful. His patents reflect a commitment to innovation and excellence in the field. His work continues to influence the development of reliable and efficient semiconductor devices.

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