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For the Inventor, By the Inventor

Tainan, Taiwan

Yu-Wen Cheng

This inventor holds 8 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2019-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yu-Wen Cheng. Retrieved from https://idiyas.com/inventor/yu-wen-cheng-a12w76bd

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 8

% Patents Active = 100.0

Average Co-Inventor Count = 9.8

ph-index = 2

Forward Citations = 7(Granted Patents)


Company Filing History:

goldMedal8 out of 42,965 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2019-2025

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8 patents (USPTO):Explore Patents
1. 12328890 - Contact with a silicide region (2025-06-10),
2. 12046510 - Conductive feature formation and structure (2024-07-23),
3. 11411094 - Contact with a silicide region (2022-08-09),
4. 11195791 - Method for forming semiconductor contact structure (2021-12-07),
5. 11031286 - Conductive feature formation and structure (2021-06-08),
6. 10535748 - Method of forming a contact with a silicide region (2020-01-14),
7. 10504834 - Contact structure and the method of forming the same (2019-12-10),
8. 10332789 - Semiconductor device with TiN adhesion layer for forming a contact plug (2019-06-25),

Title: Yu-Wen Cheng: Innovator in Semiconductor Technology

Introduction

Yu-Wen Cheng is a prominent inventor based in Tainan, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 8 patents. His work focuses on enhancing the efficiency and effectiveness of semiconductor devices.

Latest Patents

Among his latest patents, one notable invention is related to forming an effective metal diffusion barrier in sidewalls of epitaxy source/drain regions. This patent describes a structure that includes an active area with a source/drain region on a substrate, a dielectric layer over the active area, and a conductive feature along the sidewall of the dielectric layer. Another recent patent discusses conductive features that include a barrier layer and methods for their formation, emphasizing the deposition of a metal layer and the creation of a silicide region.

Career Highlights

Yu-Wen Cheng is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His innovative work has contributed to advancements in semiconductor manufacturing processes and device performance.

Collaborations

He has collaborated with notable colleagues, including Hong-Mao Lee and Wei-Yip Loh, who have also made significant contributions to the field.

Conclusion

Yu-Wen Cheng's contributions to semiconductor technology through his patents and collaborations highlight his role as an influential inventor in the industry. His work continues to impact the development of advanced semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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