Hsinchu, Taiwan

Yu-Lan Lo

This inventor holds 23 USPTO granted patents and 8 published patent applications, primarily in Circuit Design Verification. Top assignee: Realtek Semiconductor Inc.. Active years: 2012-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yu-Lan Lo. Retrieved from https://idiyas.com/inventor/yu-lan-lo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 23 

% Patents Active = 100.0

Average Co-Inventor Count = 3.3

ph-index = 1

Forward Citations = 5(Granted Patents)


Location History:

  • Jhubei, TW (2020)
  • Hsinchu County, TW (2012 - 2022)
  • Hsinchu, TW (2013 - 2024)

Company Filing History:


Years Active: 2012-2026

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Areas of Expertise:
Static Timing Analysis
Circuit Simulation
Power Leakage Testing
Integrated Circuit Design
Glitch Detection
Circuit Verification
Voltage Determination
Deadlock Detection
Circuit Characteristics
Mixed-Signal Simulation
IC Design Database
Floating Connection Inspection
23 patents (USPTO):Explore Patents

Title: Innovations by Yu-Lan Lo: A Pioneer in Circuit Simulation Technologies

Introduction: Yu-Lan Lo, an accomplished inventor based in Hsinchu County, Taiwan, has made significant contributions to the fields of circuit simulation and integrated circuit design. With a remarkable portfolio of 18 patents, Lo continues to influence the technological landscape through innovative methods and systems.

Latest Patents: Among his latest inventions is the patent titled "Method for establishing variation model related to circuit characteristics for performing circuit simulation, and associated circuit simulation system." This method employs multiple Monte Carlo simulation operations to generate performance simulation results, which are then expanded to establish a variation model for circuit simulation. His second recent patent, "Integrated circuit simulation and design method and system thereof," involves a sophisticated process for obtaining register transfer level (RTL) waveforms and applying them to circuit nodes, thereby enhancing the efficiency of integrated circuit simulations.

Career Highlights: Yu-Lan Lo currently works at Realtek Semiconductor Inc., where he engages in cutting-edge research and development. Throughout his career, he has focused on improving circuit simulation accuracy and efficiency, which plays a critical role in the design and optimization of modern electronic devices.

Collaborations: Lo collaborates with esteemed colleagues such as Shu-Yi Kao and Mei-Li Yu, both of whom contribute diverse expertise and perspectives to their projects. This collaboration fosters an environment of creativity and innovation within Realtek Semiconductor Inc.

Conclusion: With his extensive patent portfolio and dedication to improving circuit simulation technologies, Yu-Lan Lo stands out as a leading inventor in his field. His contributions not only advance the technical capabilities of integrated circuits but also pave the way for future innovations in electronics and technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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