Tsukuba, Japan

Yoshihiro Tomita

This inventor holds 50 USPTO granted patents and 2 published patent applications, primarily in Microelectronic Packaging. Top assignee: Intel Corporation. Active years: 2009-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yoshihiro Tomita. Retrieved from https://idiyas.com/inventor/yoshihiro-tomita-stbs0ldo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 50 

% Patents Active = 64.0

Average Co-Inventor Count = 4.5

ph-index = 6

Forward Citations = 129(Granted Patents)


Location History:

  • Ibaraka-Ken, JP (2013)
  • Ibaraki-Ken, JP (2011 - 2015)
  • Ibaraki, JP (2010 - 2022)
  • Tsukuba, JP (2009 - 2024)

Company Filing History:


Years Active: 2009-2026

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Areas of Expertise:
Heat Dissipation
Additive Manufacturing
Microelectronic Devices
Compound Semiconductor
Package Warpage
Integrated Circuit
Flexible Substrate
Electromagnetic Interference
Microelectronic Bridge
Stacked Dice
Interconnect Pattern
Package-on-Package
50 patents (USPTO):Explore Patents

Title: Innovations by Yoshihiro Tomita: Pioneering Solutions in Device Packaging

Introduction

Yoshihiro Tomita is a notable inventor hailing from Tsukuba, Japan, recognized for his contributions to the field of device packaging. With an impressive portfolio of 44 patents, Tomita has made significant strides in developing technologies that enhance the functionality and efficiency of electronic devices.

Latest Patents

Among his latest inventions are two remarkable patents. The first is focused on a low-cost package warpage solution. This innovation encompasses device packages and methods for their formation. It involves creating a reinforcement layer over a substrate, where device dies can be secured through openings for reliable bonding via solder bumps. The versatility of the invention is highlighted by alternative embodiments that feature adhesive-backed reinforcement layers.

The second patent details an ultra-small molded module integrated with a die through module-on-wafer assembly. This technology allows for the integration of molded modules into electrical packages. It includes a die equipped with a redistribution layer on its surface, enabling effective electrical connection between terminals of encapsulated components and the redistribution layer. Furthermore, this invention may also incorporate through-mold vias and Faraday cages to enhance functionality.

Career Highlights

Yoshihiro Tomita is currently associated with Intel Corporation, a leading technology company renowned for its innovative semiconductor products. His work has not only advanced the knowledge within the industry but has also contributed to practical applications affecting numerous electronic devices today.

Collaborations

Throughout his career, Tomita has collaborated with esteemed colleagues, including Shawna M. Liff and Omkar G. Karhade. These partnerships have fostered an environment of creativity and innovation, further propelling advancements in the field of electronics.

Conclusion

Yoshihiro Tomita's work and innovations significantly impact the world of device packaging, setting new standards for the industry. His latest patents demonstrate a commitment to enhancing technology and providing solutions that address real-world challenges in electronic device design. As he continues his journey at Intel Corporation, the ongoing contributions of this inventive mind are sure to pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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