Intel Corporation

Yoshihiro Tomita

Shawna M Liff

Omkar G Karhade

Nitin A Deshpande

Bassam Mohammed Ziadeh

Debendra Mallik

Eric Jin Li

Leonel R Arana

Javier A Falcon

Devendra Natekar

Adel A Elsherbini

Telesphor Kamgaing

Robert L Sankman

Georgios C Dogiamis

Gregory Martin Chrysler

Vijay K Nair

Joshua Heppner

Rajasekaran Swaminathan

Kinya Ichikawa

Yosuke Kanaoka

David Chau

Chi-won Hwang

Edward Rudolph Prack

Sriram Muthukumar

Amram Eitan

Mark Saltas

Timothy A Gosselin

Raul Mancera

Aleksandar Aleksov

Feras Eid

Stephen L Morein

Chuan Hu

Damion T Searls

James Daniel Jackson

Sriram Dattaguru

Sergei L Voronov

Rajen C Dias

Mihir A Oka

Tony Dambrauskas

Jiro Kubota

Lars D Skoglund

Danish Faruqui

David K Wilkinson, Jr

Lesley A Polka Wood

Wenhao Li

Chia-Pin Chiu

Sasha N Oster

John Stephen Guzek

Sanka Ganesan

Nachiket R Raravikar

Ram S Viswanath

Robert M Nickerson

Pramod Malatkar

Dingying David Xu

Srikant Nekkanty

Kiniya Ichikawa

Rob Nickerson

Lim Chong Sim

Yoko Sekihara

Technologies for high throughput additive manufacturing (HTAM) structures are disclosed. In one embodiment, a sacrificial dielectric is formed to provide a negative mask on which to pattern a conductive trace using HTAM. In another embodiment, a permanent dielectric is patterned using a processing such as laser project patterning. A conductive trace can then be patterned using HTAM. In yet another embodiment, conductive traces with tapered sidewalls can be patterned, and then a buffer layer and HTAM layer can be deposited on top.

High throughput additive manufacturing for integrated circuit components containing traces with feature size and grain boundaries

Technologies for high throughput additive manufacturing for integrated circuit components

Embodiments of the invention include device packages and methods of forming such packages. In an embodiment, the method of forming a device package may comprise forming a reinforcement layer over a substrate. One or more openings may be formed through the reinforcement layer. In an embodiment, a device die may be placed into one of the openings. The device die may be bonded to the substrate by reflowing one or more solder bumps positioned between the device die and the substrate. Embodiments of the invention may include a molded reinforcement layer. Alternative embodiments include a reinforcement layer that is adhered to the surface of the substrate with an adhesive layer.

Low cost package warpage solution

Embodiments of the invention include molded modules and methods for forming molded modules. According to an embodiment the molded modules may be integrated into an electrical package. Electrical packages according to embodiments of the invention may include a die with a redistribution layer formed on at least one surface. The molded module may be mounted to the die. According to an embodiment, the molded module may include a mold layer and a plurality of components encapsulated within the mold layer. Terminals from each of the components may be substantially coplanar with a surface of the mold layer in order to allow the terminals to be electrically coupled to the redistribution layer on the die. Additional embodiments of the invention may include one or more through mold vias formed in the mold layer to provide power delivery and/or one or more faraday cages around components.

Ultra small molded module integrated with die by module-on-wafer assembly

Embodiments of the invention include a microelectronic device that includes a first die formed with a silicon based substrate and a second die coupled to the first die. The second die is formed with compound semiconductor materials in a different substrate (e.g., compound semiconductor substrate, group III-V substrate). An antenna unit is coupled to the second die. The antenna unit transmits and receives communications at a frequency of approximately 4 GHz or higher.

Microelectronic devices with high frequency communication modules having compound semiconductor devices integrated on a package fabric

Embodiments of the invention include a microelectronic device that includes a first silicon based substrate having compound semiconductor components. The microelectronic device also includes a second substrate coupled to the first substrate. The second substrate includes an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.

Microelectronic devices designed with compound semiconductor devices and integrated on an inter die fabric

A microelectronic structure includes a microelectronic substrate having a first surface and a cavity extending into the substrate from the microelectronic substrate first surface, a first microelectronic device and a second microelectronic device attached to the microelectronic substrate first surface, and a microelectronic bridge disposed within the microelectronic substrate cavity and attached to the first microelectronic device and to the second microelectronic device. In one embodiment, the microelectronic structure may include a reconstituted wafer formed from the first microelectronic device and the second microelectronic device. In another embodiment, a flux material may extend between the first microelectronic device and the microelectronic bridge and between the second microelectronic device and the microelectronic bridge.

Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrate

Examples of an electronic package include a package assembly. The package assembly can include a substrate having a first substrate surface that includes a conductive layer attached to the first substrate surface. The package assembly includes a die communicatively coupled to the conductive layer and a contact block that includes a first contact surface on one end of the contact block, a second contact surface on an opposing side of the contact block, and a contact block wall extended therebetween. The contact block can include a conductive material. The first contact surface can be coupled to the package assembly with a joint extended partially up the contact block wall. The electronic package can further include an overmold covering portions of the substrate, conductive layer, and die. The second contact surface of the contact block can be exposed through the overmold.

Through-mold structures

Embodiments of the invention include a microelectronic device that includes a first die having a silicon based substrate and a second die coupled to the first die. In one example, the second die is formed with compound semiconductor materials. The microelectronic device includes a substrate that is coupled to the first die with a plurality of electrical connections. The substrate including an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher.

Microelectronic devices designed with high frequency communication devices including compound semiconductor devices integrated on a die fabric on package

Growing community of inventors

Tsukuba, Japan

Yoshihiro Tomita