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For the Inventor, By the Inventor

Zhubei, Taiwan

Yi-Lii Huang

This inventor holds 15 USPTO granted patents and 14 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2014-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yi-Lii Huang. Retrieved from https://idiyas.com/inventor/yi-lii-huang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15 

% Patents Active = 53.3

Average Co-Inventor Count = 3.2

ph-index = 1

Forward Citations = 3(Granted Patents)


Location History:

  • Hsinchu County, TW (2015 - 2016)
  • Hsinchu, TW (2014 - 2022)
  • Zhubei, TW (2016 - 2024)

Company Filing History:

goldMedal15 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2014-2026

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15 patents (USPTO):Explore Patents
1. 12720855 - Fin pitch optimization for uniform source/drain structures (2026-08-25),
2. 12707669 - FinFET device structure with extra fin (2026-08-11),
3. 12317554 - Contact structures for semiconductor devices (2025-05-27),
4. 12046677 - Contact for semiconductor device and method of forming thereof (2024-07-23),
5. 11652171 - Contact for semiconductor device and method of forming thereof (2023-05-16),
6. 11532559 - Semiconductor device and method for making the semiconductor device (2022-12-20),
7. 10083860 - Semiconductor structure with resist protective oxide on isolation structure and method of manufacturing the same (2018-09-25),
8. 9691867 - Semiconductor device including spacers having different dimensions (2017-06-27),
9. 9633860 - Semiconductor structure with resist protective oxide on isolation structure and method of manufacturing the same (2017-04-25),
10. 9529956 - Active region design layout (2016-12-27),
11. 9425274 - Method for forming semiconductor device including spacers having different dimensions (2016-08-23),
12. 9349817 - Semiconductor device including spacers having different dimensions (2016-05-24),
13. 9324864 - Semiconductor device structure and method for forming the same (2016-04-26),
14. 9196651 - CMOS image sensor white pixel performance (2015-11-24),
15. 8692302 - CMOS image sensor white pixel performance (2014-04-08),

Title: Yi-Lii Huang: Innovator in Semiconductor Technology

Introduction

Yi-Lii Huang is a prominent inventor based in Zhubei, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 15 patents. His work focuses on the development of advanced semiconductor devices and methods for their formation.

Latest Patents

Huang's latest patents include innovative designs for contact structures in semiconductor devices. One of his notable patents describes a method for forming a semiconductor device that involves creating a source/drain structure and a gate structure. This method includes a cleaning process on both structures and the careful deposition of materials to enhance device performance. Another patent outlines a semiconductor device that features a first gate electrode and a first conductive contact, with specific dimensions and configurations that optimize functionality.

Career Highlights

Yi-Lii Huang is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His expertise and innovative approaches have positioned him as a key player in the development of cutting-edge technologies.

Collaborations

Huang has collaborated with notable colleagues, including Chen-Liang Liao and Chih-Hsiao Chen. These partnerships have fostered a collaborative environment that enhances the innovation process within the company.

Conclusion

Yi-Lii Huang's contributions to semiconductor technology through his patents and collaborations highlight his role as a leading inventor in the field. His work continues to influence advancements in semiconductor devices, showcasing the importance of innovation in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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