Yen-Hung Lin

This inventor holds 35 USPTO granted patents and 6 published patent applications, primarily in Semiconductor Design. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., National Tsing Hua University. Active years: 2015-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yen-Hung Lin. Retrieved from https://idiyas.com/inventor/yen-hung-lin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 35 (Patent Applications = 6)

% Patents Active = 85.7

Average Co-Inventor Count = 3.2

ph-index = 4

Forward Citations = 44(Granted Patents)

Company Filing History:

34 out of 42,872

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

1 out of 1,308

National Tsing Hua University

patents

Years Active: 2015-2025

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Areas of Expertise:

Cell Placement Optimization

Power Gating

Multi-Patterning

Heterogeneous PG-Structure

Timing Driven Swapping

EUV Defect Mitigation

Variant Cell Height

3D Integrated Circuits

Layout Generation

Resource Planning

Stretchable Layout Design

Conflict Detection

35 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12402384 - Standard cell design with dummy padding (2025-08-26),

2. 12271677 - Timing driven cell swapping (2025-04-08),

3. 12131109 - Block level design method for heterogeneous PG-structure cells (2024-10-29),

4. 11983475 - Method for manufacturing a cell having pins and semiconductor device based on same (2024-05-14),

5. 11853678 - Block level design method for heterogeneous PG-structure cells (2023-12-26),

6. 11663392 - Timing driven cell swapping (2023-05-30),

7. 11574108 - Block level design method for heterogeneous PG-structure cells (2023-02-07),

8. 11574107 - Method for manufacturing a cell having pins and semiconductor device based on same (2023-02-07),

9. 11574106 - Method, system, and storage medium of resource planning for designing semiconductor device (2023-02-07),

10. 11182527 - Cell placement site optimization (2021-11-23),

11. 11176303 - Constrained cell placement (2021-11-16),

12. 11055466 - Block level design method for heterogeneous PG-structure cells (2021-07-06),

13. 11030372 - Method for generating layout diagram including cell having pin patterns and semiconductor device based on same (2021-06-08),

14. 10990741 - Multiple patterning method and system for implementing the method (2021-04-27),

15. 10977416 - Timing driven cell swapping (2021-04-13),

Title: Inventor Yen-Hung Lin - Revolutionizing Technology in Hsinchu

Introduction: Yen-Hung Lin is a pioneering inventor based in Hsinchu, Taiwan, known for her groundbreaking contributions to the field of technology.

Latest Patents: Yen-Hung Lin holds several patents in the areas of semiconductor technology, renewable energy, and artificial intelligence, showcasing her innovative spirit and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Yen-Hung Lin has worked with leading tech companies and research institutions, playing a key role in developing cutting-edge technologies that have shaped the industry.

Collaborations: Throughout her career, Yen-Hung Lin has collaborated with top engineers, scientists, and researchers, fostering a culture of innovation and excellence in all her projects.

Conclusion: Yen-Hung Lin's passion for innovation and her relentless pursuit of technological advancement continue to inspire the next generation of inventors and shape the future of technology in Hsinchu and beyond.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

6 patents pending: