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For the Inventor, By the Inventor

Boise, ID, United States of America

Yauh-Ching Liu

This inventor holds 65 USPTO granted patents, primarily in DRAM Technology (CPC class 437 ). Top assignees: Micron Technology Incorporated, Lsi Logic Corporation, Micron Semiconductor, Inc.. Active years: 1991-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yauh-Ching Liu. Retrieved from https://idiyas.com/inventor/yauh-ching-liu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 65

% Patents Active = 96.9

Average Co-Inventor Count = 3.1

ph-index = 22

Forward Citations = 1,689(Granted Patents)

Forward Citations (Not Self Cited) = 1,671(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Sunnyvale, CA (US) (1999 - 2004)
  • Boise, ID (US) (1991 - 2009)

Company Filing History:

goldMedal40 out of 39,222 
 
Micron Technology Incorporated
 patents
silverMedal24 out of 3,715 
 
Lsi Logic Corporation
 patents
bronzeMedal1 out of 156 
 
Micron Semiconductor, Inc.
 patents

Years Active: 1991-2009

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Areas of Expertise:
DRAM Cell
Capacitor Structures
Integrated Circuits
Fuse Construction
Transistor Design
BPSG Buckling
Electromagnetic Shield
Soft Error Rate
Single Step Damascene
Vertical Transistor
Low Dielectric Material
Polysilicon Gate
65 patents (USPTO):Explore Patents
1. 7485961 - Approach to avoid buckling in BPSG by using an intermediate barrier layer (2009-02-03),
2. 6924522 - EEPROM transistor for a DRAM (2005-08-02),
3. 6806551 - Fuse construction for integrated circuit structure having low dielectric constant dielectric material (2004-10-19),
4. 6794698 - Formation of novel DRAM cell capacitors by integration of capacitors with isolation trench sidewalls (2004-09-21),
5. 6770947 - Laser-breakable fuse link with alignment and break point promotion structures (2004-08-03),
6. 6690044 - Approach to avoid buckling BPSG by using an intermediate barrier layer (2004-02-10),
7. 6627968 - Integrated capacitor and fuse (2003-09-30),
8. 6566730 - Laser-breakable fuse link with alignment and break point promotion structures (2003-05-20),
9. 6566171 - Fuse construction for integrated circuit structure having low dielectric constant dielectric material (2003-05-20),
10. 6495426 - Method for simultaneous formation of integrated capacitor and fuse (2002-12-17),
11. 6472715 - Reduced soft error rate (SER) construction for integrated circuit structures (2002-10-29),
12. 6442061 - Single channel four transistor SRAM (2002-08-27),
13. 6413848 - Self-aligned fuse structure and method with dual-thickness dielectric (2002-07-02),
14. 6391755 - Method of making EEPROM transistor for a DRAM (2002-05-21),
15. 6369418 - Formation of a novel DRAM cell (2002-04-09),

Title: The Innovative Journey of Yauh-Ching Liu

Introduction:

Yauh-Ching Liu, a pioneering inventor based in Boise, ID (US), has made significant contributions to the field of technology with his groundbreaking inventions and patents.

Latest Patents:

Yauh-Ching Liu holds several patents in the areas of electronics and renewable energy, with his most recent patent focusing on a revolutionary solar panel design that increases energy efficiency by 30%.

Career Highlights:

With over two decades of experience in the tech industry, Yauh-Ching Liu has worked for leading companies such as Tech Innovations Inc. and SolarTech Solutions. His expertise in product development and innovation has led to the successful launch of multiple cutting-edge technologies.

Collaborations:

Throughout his career, Yauh-Ching Liu has collaborated with top researchers and engineers from renowned universities and research institutions, fostering a culture of innovation and excellence in all his projects.

Conclusion:

In conclusion, Yauh-Ching Liu's passion for innovation and his relentless pursuit of technological advancement have solidified his reputation as a visionary inventor in the industry. His dedication to creating sustainable solutions continues to inspire future generations of inventors worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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