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For the Inventor, By the Inventor

Kodaira, Japan

Yasunobu Kosa

This inventor holds 15 USPTO granted patents. Top assignee: Hitachi, Ltd.. Active years: 1976-1990.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yasunobu Kosa. Retrieved from https://idiyas.com/inventor/yasunobu-kosa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15

% Patents Active = 100.0

Average Co-Inventor Count = 2.2

ph-index = 10

Forward Citations = 393(Granted Patents)


Location History:

  • Kodaira, JA (1976 - 1978)
  • Kodaira, JP (1978 - 1990)

Company Filing History:

goldMedal15 out of 42,731 
 
Hitachi, Ltd.
 patents

Years Active: 1976-1990

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15 patents (USPTO):Explore Patents
1. 4926222 - Semiconductor memory device and a method of manufacturing the same (1990-05-15),
2. 4818718 - Method of manufacturing semiconductor memory device (1989-04-04),
3. 4764479 - Semiconductor integrated circuit device and method of manufacturing the (1988-08-16),
4. 4651406 - Forming memory transistors with varying gate oxide thicknesses (1987-03-24),
5. 4471373 - Semiconductor integrated circuit device with memory MISFETS and thin and (1984-09-11),
6. 4451904 - Semiconductor memory device (1984-05-29),
7. 4426764 - Semiconductor memory device with peripheral circuits (1984-01-24),
8. 4373249 - Method of manufacturing a semiconductor integrated circuit device (1983-02-15),
9. 4356041 - Method of fabricating a mis-type device by using a gate electrode and (1982-10-26),
10. 4199778 - Interconnection structure for semiconductor integrated circuits (1980-04-22),
11. 4110899 - Method for manufacturing complementary insulated gate field effect (1978-09-05),
12. 4079504 - Method for fabrication of n-channel MIS device (1978-03-21),
13. 4012763 - Semiconductor device having insulator film with different prescribed (1977-03-15),
14. 4011581 - MOSFET antiparasitic layer (1977-03-08),
15. 3946425 - Multi-emitter transistor having heavily doped N+ regions surrounding (1976-03-23),

Title: Yasunobu Kosa: A Pioneer in Semiconductor Innovations

Introduction

Yasunobu Kosa is a prominent inventor based in Kodaira, Japan, known for his significant contributions to the field of semiconductor technology. With a remarkable portfolio of 15 patents, he has played a key role in advancing memory devices that are essential for modern computing and data storage.

Latest Patents

One of his latest innovations is a semiconductor memory device along with a method of manufacturing it. This patent outlines a design where a field insulation is created on the surface of a semiconductor body, safeguarding the source, drain, and channel regions. The invention introduces a self-aligned first floating gate to the channel region, complemented by a second gate insulated from the first, effectively covering the first floating gate and aligned with the channel region's length.

Additionally, Kosa has created a method of manufacturing a semiconductor integrated circuit device, specifically focused on an EPROM (Electrically Programmable Read Only Memory) device. This design features a MIS type memory transistor with a floating gate electrode topped by a control gate electrode, which is executed by patterning the same conductor layer as the floating gate in the periphery of the memory transistor.

Career Highlights

Yasunobu Kosa's career is prominently associated with Hitachi, Ltd., where he has been integral to various innovations in semiconductor technology. His work enables advancements in both performance and efficiency for memory devices, contributing significantly to the broader electronics industry.

Collaborations

Throughout his career, Kosa has collaborated with notable coworkers such as Kazuhiro Komori and Shinji Shimizu. Their synergy has fostered a productive environment, resulting in groundbreaking developments and enhancements in semiconductor memory technology.

Conclusion

Yasunobu Kosa stands out as a key figure in the semiconductor industry, with a strong track record of patents and collaborations. His innovative ideas and practical methodologies continue to influence the evolution of electronic devices, informing the next generation of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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