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For the Inventor, By the Inventor

Pöttmes, Germany

Valentin Rosskopf

USPTO Granted Patents = 12

Average Co-Inventor Count = 3.0

ph-index = 4

Forward Citations = 111(Granted Patents)


Location History:

  • Poettmess-Schorn, DE (2002)
  • Poettmes, DE (2003 - 2005)
  • Pöttmes, DE (2005)
  • Poettmes-Schorn, DE (2007 - 2008)

Company Filing History:

goldMedal12 out of 14,705 
 
Infineon Technologies Ag
 patents

Years Active: 2002-2008

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12 patents (USPTO):
1. 7372072 - Semiconductor wafer with test structure (2008-05-13),
2. 7205567 - Semiconductor product having a semiconductor substrate and a test structure and method (2007-04-17),
3. 6930325 - Test structure for improved vertical memory arrays (2005-08-16),
4. 6930324 - Device architecture and process for improved vertical memory arrays (2005-08-16),
5. 6897077 - Test structure for determining a short circuit between trench capacitors in a memory cell array (2005-05-24),
6. 6878965 - Test structure for determining a region of a deep trench outdiffusion in a memory cell array (2005-04-12),
7. 6856562 - Test structure for measuring a junction resistance in a DRAM memory cell array (2005-02-15),
8. 6853000 - Test structure for determining a doping region of an electrode connection between a trench capacitor and a selection transistor in a memory cell array (2005-02-08),
9. 6838724 - Transistor array and semiconductor memory configuration fabricated with the transistor array (2005-01-04),
10. 6656647 - Method for examining structures on a wafer (2003-12-02),
11. 6529031 - Integrated circuit configuration for testing transistors, and a semiconductor wafer having such a circuit configuration (2003-03-04),
12. 6484307 - Method for fabricating and checking structures of electronic circuits in a semiconductor substrate (2002-11-19),
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