logo

For the Inventor, By the Inventor

Saratoga, CA, United States of America

Tze-Chiang Huang

This inventor holds 40 USPTO granted patents and 10 published patent applications, primarily in Semiconductor Technology. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Global Unichip Corporation, TSMC Nanjing Company, Limited. Active years: 2014-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tze-Chiang Huang. Retrieved from https://idiyas.com/inventor/tze-chiang-huang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 40 

% Patents Active = 95.0

Average Co-Inventor Count = 4.2

ph-index = 3

Forward Citations = 47(Granted Patents)


Location History:

  • San Jose, CA (US) (2014 - 2017)
  • Sartoga, CA (US) (2020)
  • Hsin-Chu, TW (2020 - 2023)
  • Saratoga, CA (US) (2017 - 2024)

Company Filing History:

goldMedal39 out of 42,926 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal5 out of 247 
 
Global Unichip Corporation
 patents
bronzeMedal4 out of 115 
 
TSMC Nanjing Company, Limited
 patents
4. 1 out of 491 
 
Taiwan Semiconductor Manufacturing Co., Ltd.
 patents
where one patent can have more than one assignee

Years Active: 2014-2026

Loading Chart...
Areas of Expertise:
Semiconductor Packages
Voltage Regulator
Integrated Circuit
3D Stacking
System on Chip
Impedance Measurement
Through-Silicon Via
Die to Die Interface
Power Estimation
Random Number Generator
Machine Learning
Battery Discharge Simulation
40 patents (USPTO):Explore Patents
1. 12733557 - Semiconductor device and method of manufacture (2026-09-08),
2. 12355006 - Semiconductor packages and methods of manufacturing thereof (2025-07-08),
3. 12271667 - System on chip (SOC) current profile model for integrated voltage regulator (IVR) co-design (2025-04-08),
4. 12261532 - Trim-based voltage regulator circuit and method (2025-03-25),
5. 12175175 - Systems and methods for generating synthesizable netlists from register transfer level designs (2024-12-24),
6. 12136609 - Semiconductor device and method of manufacture (2024-11-05),
7. 12113051 - Die to die interface circuit (2024-10-08),
8. 12095711 - Integrated circuit with radio frequency interconnect (2024-09-17),
9. 12038463 - Integrated impedance measurement device and impedance measurement method thereof (2024-07-16),
10. 11940822 - Semiconductor device including a voltage regulator and an integrated circuit module (2024-03-26),
11. 11854943 - Memory macro including through-silicon via (2023-12-26),
12. 11740272 - Integrated impedance measurement device and impedance measurement method thereof (2023-08-29),
13. 11735565 - Semiconductor device and method of manufacture (2023-08-22),
14. 11699683 - Semiconductor device in 3D stack with communication interface and managing method thereof (2023-07-11),
15. 11687472 - Interface for semiconductor device and interfacing method thereof (2023-06-27),

Title: The Inventor Profile of Tze-Chiang Huang

Introduction: Tze-Chiang Huang is a renowned inventor based in Saratoga, CA (US) known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Tze-Chiang Huang holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his expertise in cutting-edge technologies.

Career Highlights: With a career spanning over two decades, Tze-Chiang Huang has worked with leading tech companies, spearheading research and development projects that have led to significant advancements in the industry.

Collaborations: Throughout his career, Tze-Chiang Huang has collaborated with top researchers, engineers, and scientists, fostering a culture of innovation and pushing the boundaries of what is possible in the tech world.

Conclusion: Tze-Chiang Huang's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…