The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2023
Filed:
Aug. 20, 2020
Global Unichip Corporation, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Igor Elkanovich, Hsinchu, TW;
Amnon Parnass, Hsinchu, TW;
Pei Yu, Hsinchu, TW;
Li-Ken Yeh, Hsinchu, TW;
Yung-Sheng Fang, Hsinchu, TW;
Sheng-Wei Lin, Hsinchu, TW;
Tze-Chiang Huang, Hsinchu, TW;
King Ho Tam, Hsinchu, TW;
Ching-Fang Chen, Hsinchu, TW;
GLOBAL UNICHIP CORPORATION, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
An interface for a semiconductor device is provided. The semiconductor device has a master device and multiple slave devices as stacked up with electric connection. The interface includes a master interface, implemented in the master device and including a master interface circuit with a master bond pattern. Further, a slave interface is implemented in each slave device and includes a slave interface circuit with a slave bond pattern to correspondingly connect to the master bond pattern. A clock route is to transmit a clock signal through the master interface and the slave interface. The master device transmits a command and a selecting slave identification through the master interface to all the slave interfaces. One of the slave devices corresponding to the selecting slave identification executes the command and responds a result back to the master device through the slave interfaces and the master interface.