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For the Inventor, By the Inventor

Ome, Japan

Tsuneo Terasawa

This inventor holds 56 USPTO granted patents, primarily in Semiconductor Manufacturing (CPC class 355 ). Top assignees: Hitachi, Ltd., Renesas Technology Corp., Kabushiki Kaisha Toshiba. Active years: 1984-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Tsuneo Terasawa. Retrieved from https://idiyas.com/inventor/tsuneo-terasawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 56

% Patents Active = 87.5

Average Co-Inventor Count = 3.6

ph-index = 17

Forward Citations = 958(Granted Patents)

Forward Citations (Not Self Cited) = 950(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Kokubunji, JP (1984 - 1985)
  • Hachioji, JP (1986 - 1994)
  • Oume, JP (1994)
  • Ohme, JP (1993 - 2001)
  • Tokyo, JP (2009 - 2013)
  • Kawasaki, JP (2014)
  • Ome, JP (1993 - 2015)
  • Kanagawa, JP (2015 - 2016)
  • Tsukuba Ibaraki, JP (2018)

Company Filing History:

goldMedal36 out of 42,726 
 
Hitachi, Ltd.
 patents
silverMedal9 out of 3,781 
 
Renesas Technology Corp.
 patents
bronzeMedal7 out of 53,250 
 
Kabushiki Kaisha Toshiba
 patents
4. 5 out of 7,651 
 
Renesas Electronics Corporation
 patents
5. 2 out of 3,208 
 
Dai Nippon Printing Co., Ltd.
 patents
6. 1 out of 1,674 
 
Fujitsu Semiconductor Limited
 patents
7. 1 out of 834,453 
Other
 patents
where one patent can have more than one assignee

Years Active: 1984-2018

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Areas of Expertise:
Mask Inspection
Photomask Fabrication
Defect Inspection
Semiconductor Device
Pattern Formation
Projection Exposure
Optical System
Alignment Marks
Manufacturing Method
Integrated Circuits
Substrate Patterning
Exposure Method
56 patents (USPTO):Explore Patents
1. 9958399 - Imaging apparatus and imaging method (2018-05-01),
2. 9229314 - Method of inspecting mask, mask inspection device, and method of manufacturing mask (2016-01-05),
3. 9063098 - Method of inspecting mask, mask inspection device, and method of manufacturing mask (2015-06-23),
4. 8986913 - Method and apparatus for inspecting a mask substrate for defects, method of manufacturing a photomask, and method of manufacturing a semiconductor device (2015-03-24),
5. 8912501 - Optimum imaging position detecting method, optimum imaging position detecting device, photomask manufacturing method, and semiconductor device manufacturing method (2014-12-16),
6. 8797524 - Mask inspection method and mask inspection apparatus (2014-08-05),
7. 8699783 - Mask defect inspection method and defect inspection apparatus (2014-04-15),
8. 8488866 - Method of inspecting mask pattern and mask pattern inspection apparatus (2013-07-16),
9. 8435702 - Manufacturing method of semiconductor device and manufacturing method of mask (2013-05-07),
10. 8384888 - Mask defect measurement method, mask quality determination and method, and manufacturing method of semiconductor device (2013-02-26),
11. 7911600 - Apparatus and a method for inspection of a mask blank, a method for manufacturing a reflective exposure mask, a method for reflective exposure, and a method for manufacturing semiconductor integrated circuits (2011-03-22),
12. 7630068 - Method and system of defect inspection for mask blank and method of manufacturing semiconductor device using the same (2009-12-08),
13. 7369703 - Method and apparatus for circuit pattern inspection (2008-05-06),
14. 7361530 - Method of fabricating a semiconductor integrated circuit that includes patterning a semiconductor substrate with a first photomask that uses metal for blocking light and patterning the same substrate with a second photomask that uses organic resin for blocking light (2008-04-22),
15. 7205222 - Method of fabricating a semiconductor integrated circuit that includes patterning a semiconductor substrate with a first photomask that uses metal for blocking light and patterning the same substrate with a second photomask that uses organic resin for blocking light (2007-04-17),

Title: Tsuneo Terasawa: Pioneering Inventor from Ome, Japan

Introduction: Tsuneo Terasawa is a renowned inventor hailing from Ome, Japan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Tsuneo Terasawa holds several patents in the areas of robotics, artificial intelligence, and renewable energy technologies, showcasing his continuous dedication to pushing the boundaries of technological advancement.

Career Highlights: With a career spanning over three decades, Tsuneo Terasawa has worked with leading tech companies and research institutions, playing a pivotal role in the development of cutting-edge technologies that have revolutionized various industries.

Collaborations: Throughout his career, Tsuneo Terasawa has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of innovation and knowledge-sharing that has led to numerous breakthrough inventions.

Conclusion: Tsuneo Terasawa's passion for innovation and his relentless pursuit of technological excellence have solidified his reputation as a visionary inventor, inspiring the next generation of innovators to push the boundaries of what is possible in the world of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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