Kanagawa, Japan

Takehiro Ueda

This inventor holds 36 USPTO granted patents and 4 published patent applications, primarily in Semiconductor Devices. Top assignees: Renesas Electronics Corporation, Nec Electronics Corporation, Nec Corporation. Active years: 2000-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takehiro Ueda. Retrieved from https://idiyas.com/inventor/takehiro-ueda

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 36 

% Patents Active = 69.4

Average Co-Inventor Count = 1.1

ph-index = 6

Forward Citations = 88(Granted Patents)


Location History:

  • Kawasaki, JP (2008 - 2015)
  • Kanagawa, JP (2007 - 2017)
  • Tokyo, JP (2000 - 2024)

Company Filing History:


Years Active: 2000-2026

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Areas of Expertise:
Semiconductor Device
Fuse Element
Manufacturing Method
Electrode Plating
Surge Recirculation
Electrical Fuse
MOS Semiconductor
Integrated Resistors
Concave Portion
Turn-On Resistors
Surge Protection
Testing Method
36 patents (USPTO):Explore Patents

Title: Takehiro Ueda: Pioneering Innovations in Semiconductor Technology

Introduction

Takehiro Ueda is a renowned inventor based in Kanagawa, Japan, holding an impressive total of 33 patents. His work primarily focuses on advancements in semiconductor technology, contributing significantly to the development and manufacturing methods of semiconductor devices.

Latest Patents

Among his latest inventions, Ueda has created a novel method for manufacturing semiconductor devices, which involves a unique process of forming semiconductor devices from a semiconductor wafer. This method includes identifying the position of each device through distinct repeating patterns, ensuring that each semiconductor device boasts a unique pattern based on multiple arrangement structures. Another noteworthy patent is for a semiconductor device that features electrode plating deposition. This invention consists of a first electrode, a second electrode, and a third electrode, where the deposition areas on the electrodes are specifically designed for optimal performance. The configurations allow for a longer periphery on the third plating deposition portion compared to the second, enhancing the function of the overall device.

Career Highlights

Throughout his career, Ueda has been associated with leading technology firms such as Renesas Electronics Corporation and NEC Electronics Corporation. His roles in these companies have allowed him to refine his innovative skills and contribute to cutting-edge semiconductor technologies.

Collaborations

Ueda has collaborated with notable professionals in the field, including Hiroshi Kawaguchi and Norio Okada. Together, they have fostered advancements in semiconductor design and manufacturing processes, further solidifying Ueda's reputation as a key figure in the innovation landscape.

Conclusion

Takehiro Ueda's contributions to semiconductor technology through his inventions and patents mark him as a significant inventor in Japan. With a total of 33 patents, his work continues to influence the industry and showcase the importance of innovation in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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