The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Feb. 06, 2018
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Takehiro Ueda, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 29/06 (2006.01); H01L 29/205 (2006.01); H01L 21/265 (2006.01); H01L 29/778 (2006.01); H01L 29/66 (2006.01); H01L 21/761 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0688 (2013.01); H01L 21/26546 (2013.01); H01L 21/761 (2013.01); H01L 29/0646 (2013.01); H01L 29/0657 (2013.01); H01L 29/205 (2013.01); H01L 29/402 (2013.01); H01L 29/42368 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 29/7787 (2013.01); H01L 29/2003 (2013.01);
Abstract

A high-electron-mobility transistor has a buffer layer, a channel layer, a barrier layer, a mesa-shaped cap layer, a source electrode formed on one side of the cap layer, a drain electrode formed on the other side, and a gate electrode formed over the cap layer via a gate insulating film. The semiconductor device has an element isolation region defining an active region in which the semiconductor device is provided. The gate electrode extends from over the active region to the over the element isolation region. In plan view, the active region has a projection part projected to the direction of the element isolation region in a region overlapped with the gate electrode. By providing the active region with a projection part, the channel length of a parasitic transistor can be increased, and turn-on of the parasitic transistor can be suppressed.


Find Patent Forward Citations

Ueda, Takehiro. (2019). Semiconductor device and method of manufacturing semiconductor device (U.S. Patent No. 10396153). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10396153

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…