logo

For the Inventor, By the Inventor

Kaohsiung, Taiwan

Su Tao

This inventor holds 77 USPTO granted patents, primarily in Semiconductor Packaging (CPC class H01L). Top assignees: Advanced Semiconductor Engineering, Inc., Industrial Technology Research Institute, Other. Active years: 1995-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Su Tao. Retrieved from https://idiyas.com/inventor/su-tao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 77

% Patents Active = 97.4

Average Co-Inventor Count = 2.9

ph-index = 19

Forward Citations = 1,244(Granted Patents)

Forward Citations (Not Self Cited) = 1,239(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Gau-Shyong, TW (1995)
  • Hsinchu, TW (1999)
  • Kaoshiung, TW (2005 - 2007)
  • Kaohsiung, TW (2000 - 2009)

Company Filing History:

goldMedal73 out of 1,968 
 
Advanced Semiconductor Engineering, Inc.
 patents
silverMedal3 out of 9,308 
 
Industrial Technology Research Institute
 patents
bronzeMedal1 out of 834,570 
Other
 patents

Years Active: 1995-2009

Loading Chart...
Areas of Expertise:
Semiconductor Chip Package
Wafer Stacking Package
Multi-Chip Package
Bump Fabrication Process
Leadless Package
Thermal Enhance MCM
Optical Component Package
Wafer-Level Structure
Under-Bump Metallurgy
Microsystem Package
Solder Ball Attaching
Lead-Free Bump
77 patents (USPTO):Explore Patents
1. 7605020 - Semiconductor chip package (2009-10-20),
2. 7473581 - Wafer stacking package method (2009-01-06),
3. 7321168 - Semiconductor package and method for manufacturing the same (2008-01-22),
4. 7291926 - Multi-chip package structure (2007-11-06),
5. 7253529 - Multi-chip package structure (2007-08-07),
6. 7168352 - Process for sawing substrate strip (2007-01-30),
7. 7151308 - Semiconductor chip package (2006-12-19),
8. 7141867 - Quad flat non-leaded package (2006-11-28),
9. 7129583 - Multi-chip package structure (2006-10-31),
10. 7102241 - Leadless semiconductor package (2006-09-05),
11. 7064428 - Wafer-level package structure (2006-06-20),
12. 7037759 - Semiconductor package and method for manufacturing the same (2006-05-02),
13. 7023082 - Semiconductor package and manufacturing method thereof (2006-04-04),
14. 7009302 - Micromachine package and method for manufacturing the same (2006-03-07),
15. 7002805 - Thermal enhance MCM package and manufacturing method thereof (2006-02-21),

Title: The Innovative Journey of Su Tao: Pioneering Inventor from Kaohsiung

Introduction: Su Tao, a trailblazing inventor hailing from Kaohsiung, Taiwan, has been making waves in the world of technology with her groundbreaking creations and forward-thinking approach.

Latest Patents: Su Tao's recent patents include a revolutionary smart home device that integrates artificial intelligence for enhanced user experience, as well as a sustainable energy solution aimed at reducing carbon footprint in urban areas.

Career Highlights: With a background in electrical engineering and a passion for sustainable innovation, Su Tao has led numerous successful projects in the renewable energy sector, earning her recognition as a leading expert in the field.

Collaborations: Throughout her career, Su Tao has collaborated with top research institutions and universities both locally and internationally, fostering a culture of innovation and knowledge-sharing to drive progress in the industry.

Conclusion: Su Tao's dedication to pushing the boundaries of technology and her commitment to creating a more sustainable future make her a true visionary in the world of inventions. Her impact continues to inspire the next generation of inventors and innovators worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…