logo

For the Inventor, By the Inventor

Gyeonggi-do, South Korea

Soo Yeol Chai

This inventor holds 20 USPTO granted patents and 3 published patent applications, primarily in Semiconductor Memory. Top assignee: Skhynix Inc.. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Soo Yeol Chai. Retrieved from https://idiyas.com/inventor/soo-yeol-chai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 20 

% Patents Active = 95.0

Average Co-Inventor Count = 1.2

ph-index = 1

Forward Citations = 4(Granted Patents)


Location History:

  • Gyeonggi-do, KR (2022 - 2023)
  • Icheon-si, KR (2021 - 2024)

Company Filing History:

goldMedal20 out of 11,696 
 
Skhynix Inc.
 patents

Years Active: 2021-2026

Loading Chart...
Areas of Expertise:
Semiconductor Memory
Memory Device
Programming
Erase Operation
Page Buffer
Signal Interference
Control Logic
Voltage Control
Threshold Voltage
Wafer-to-Wafer Bonding
Data Verification
Fail Bits
20 patents (USPTO):Explore Patents
1. 12770662 - Nonvolatile memory device including multiple page buffers and operating method thereof (2026-10-20),
2. 12718900 - Semiconductor memory apparatus and method for controlling a semiconductor memory apparatus verification operation (2026-08-25),
3. 12676192 - Memory device for supporting efficient erase operation and operating method of memory device (2026-07-07),
4. 12512147 - Apparatus and method for programming data into non-volatile memory device (2025-12-30),
5. 12482504 - Page buffer circuit and operation method thereof (2025-11-25),
6. 12394496 - Apparatus and method for reducing signal interference in a semiconductor device (2025-08-19),
7. 12254932 - Memory device for effectively checking program state and operation method thereof (2025-03-18),
8. 12148485 - Memory device and operating method of the memory device including detecting erase cell disturbance during programming (2024-11-19),
9. 12062403 - Page buffer comprising a bit line controller and latch units (2024-08-13),
10. 11894066 - Semiconductor memory device and method of operating the semiconductor memory device (2024-02-06),
11. 11710728 - Memory device having wafer-to-wafer bonding structure (2023-07-25),
12. 11676667 - Memory device having page buffer (2023-06-13),
13. 11636906 - Memory device and method of applying operating voltage (2023-04-25),
14. 11581028 - Memory device for counting fail bits included in sensed data (2023-02-14),
15. 11508439 - Memory device having a control logic to control program operations and method of operating the same (2022-11-22),

Title: The Innovative Journey of Inventor Soo Yeol Chai

Introduction:

Soo Yeol Chai, a distinguished inventor hailing from Gyeonggi-do, South Korea, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents:

Soo Yeol Chai's latest patents include cutting-edge advancements in artificial intelligence algorithms for autonomous vehicles, revolutionizing the way we perceive transportation technology.

Career Highlights:

With a career spanning over two decades, Soo Yeol Chai has worked tirelessly to push the boundaries of technological innovation. His work in the development of renewable energy solutions has garnered international acclaim, showcasing his commitment to sustainability.

Collaborations:

Throughout his career, Soo Yeol Chai has collaborated with leading research institutions and tech companies to bring his inventions to life. His partnerships have been instrumental in bringing his visionary ideas from concept to reality.

Conclusion:

Inventor Soo Yeol Chai's relentless pursuit of innovation and his passion for creating a sustainable future have solidified his position as a trailblazer in the world of technology. His contributions continue to inspire the next generation of inventors and shape the landscape of technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…