Memory device for supporting efficient erase operation and operating method of memory device

Abstract

A memory device includes a memory block having multiple string groups, and a controller configured to repeat one or more erase loops, each erase loop including a pulse application interval and a verification interval, configured to determine the multiple string groups as one of pass and fail string groups in a verification interval of a previous erase loop, and configured to apply a first voltage to a drain selection line corresponding to the fail string group from start timing to first timing, apply the first voltage to a drain selection line corresponding to the pass string group from the start timing to second timing earlier than the first timing, and apply a second voltage to the drain selection line from the second timing to the first timing in a pulse application interval of a subsequent erase loop subsequent to the previous erase loop.