The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Jul. 09, 2024
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventor:

Soo Yeol Chai, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/24 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01);
Abstract

A semiconductor memory apparatus includes a plurality of bit lines, a plurality of page buffers, and a page buffer control circuit. The plurality of page buffers are each coupled with the plurality of bit lines and operate in response to a plurality of page buffer control signals. The page buffer control circuit generates the plurality of page buffer control signals to perform program and verification operations comprising a plurality of loops. The page buffer control circuit uses the plurality of page buffer control signals to simultaneously precharge bit lines coupled with page buffers, among the plurality of page buffers, corresponding to a plurality of verification levels corresponding to each of the plurality of loops.


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