Yokohama, Japan

Shunichi Hiraki

This inventor holds 20 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Tokyo Shibaura Denki Kabushiki Kaisha, Kabushiki Kaisha Toshiba, Tokyo Shibaura Electric Co., Ltd.. Active years: 1979-1996.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shunichi Hiraki. Retrieved from https://idiyas.com/inventor/shunichi-hiraki

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.5

ph-index = 12

Forward Citations = 596(Granted Patents)


Location History:

  • Yokohama, JP (1979 - 1985)
  • Fujisawa, JP (1986)
  • Hiratsuka, JP (1984 - 1987)
  • Hyogo, JP (1985 - 1988)
  • Chiba, JP (1992 - 1993)
  • Nagareyama, JP (1994 - 1996)

Company Filing History:


Years Active: 1979-1996

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Areas of Expertise:
Semiconductor Device
Vertical MOSFET
Trench Gate Structure
Power Semiconductor
Schottky FET
Integrated Devices
Multi-layered Structure
Silicon Carbide Mask
Bipolar Semiconductor
Selective Nitride Layer
Aluminum Diffusion
Fluorine-doped Silicon
20 patents (USPTO):Explore Patents

Title: Shunichi Hiraki - Innovator in Semiconductor Technology

Introduction

Shunichi Hiraki is a prominent inventor based in Yokohama, Japan, known for his significant contributions to the field of semiconductor technology. With a remarkable portfolio of 20 patents, Hiraki has paved the way for innovations that enhance the performance and efficiency of semiconductor devices.

Latest Patents

Among his latest patents is a groundbreaking invention related to semiconductor devices that significantly increases device breakdown voltage. In his patented method, a composite substrate is created by bonding two semiconductor substrates through an oxide film. By adjusting the potential of the second substrate above the minimum potential of the first substrate’s element forming region, the breakdown voltage is notably improved. Additionally, Hiraki's innovation includes a hybrid design that optimizes the thickness of the element forming region, which helps mitigate base curvature influence and further enhances breakdown voltage capabilities.

Another noteworthy patent focuses on a vertical MOSFET with a trench design covered by a multilayer gate film. This design incorporates an insulating layer that minimizes changes in gate threshold voltage. The specifications of the trench ensure that the dielectric breakdown electric field strength is maintained within an optimal range, solidifying the reliability and efficiency of the MOSFET performance.

Career Highlights

Hiraki has worked with renowned companies in the technology sector, including Tokyo Shibaura Denki Kabushiki Kaisha and Toshiba Corporation. His experience in these organizations has allowed him to refine his expertise and push the boundaries of semiconductor innovation.

Collaborations

Throughout his career, Shunichi Hiraki has collaborated with esteemed colleagues, including Toshio Yonezawa and Yoshiro Baba. Together, they have contributed to advancing semiconductor technologies and expanding the scope of potential applications in various industries.

Conclusion

Shunichi Hiraki's contributions to semiconductor technology, exemplified by his numerous patents and innovative designs, underscore his status as a leading inventor in the field. His work not only addresses current industry challenges but also sets a foundation for future advancements in semiconductor applications.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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