The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 1996

Filed:

Mar. 27, 1995
Applicant:
Inventors:

Yoshiro Baba, Yokohama, JP;

Shunichi Hiraki, Nagareyama, JP;

Akihiko Osawa, Machida, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257342 ; 257343 ; 257347 ; 257492 ; 257901 ;
Abstract

In a semiconductor device including a composite substrate formed by bonding first and second semiconductor substrates to each other through an oxide film and an insulator isolation trench formed from a major surface of the first semiconductor substrate to reach the oxide film and to surround an element forming region, when the potential of the second substrate is set at a potential higher than the minimum potential in the element forming region of the first substrate, an breakdown voltage can be increased. In a semiconductor integrated circuit having an element isolation region, a semiconductor device of a perfect dielectric isolation structure having an element forming region having a thickness smaller than that of the element forming region of a P-N junction isolation structure is used to reduce, e.g., a base curvature influence, thereby obtaining a further high breakdown voltage.


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