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For the Inventor, By the Inventor

Hsinchu, Taiwan

Shin-Yi Tsai

This inventor holds 11 USPTO granted patents. Top assignee: Macronix International Co., Ltd.. Active years: 2002-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shin-Yi Tsai. Retrieved from https://idiyas.com/inventor/shin-yi-tsai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 11

% Patents Active = 100.0

Average Co-Inventor Count = 2.7

ph-index = 4

Forward Citations = 101(Granted Patents)


Location History:

  • Kaohsiung, TW (2002 - 2006)
  • Hsin-Chu, TW (2002 - 2008)

Company Filing History:

goldMedal11 out of 3,609 
 
Macronix International Co., Ltd.
 patents

Years Active: 2002-2008

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11 patents (USPTO):Explore Patents
1. 7361604 - Method for reducing dimensions between patterns on a hardmask (2008-04-22),
2. 7303995 - Method for reducing dimensions between patterns on a photoresist (2007-12-04),
3. 7105099 - Method of reducing pattern pitch in integrated circuits (2006-09-12),
4. 7033948 - Method for reducing dimensions between patterns on a photoresist (2006-04-25),
5. 6790772 - Dual damascene processing method using silicon rich oxide layer thereof and its structure (2004-09-14),
6. 6750150 - Method for reducing dimensions between patterns on a photoresist (2004-06-15),
7. 6635579 - Operating method of a semiconductor etcher (2003-10-21),
8. 6601596 - Apparatus for cleaning a wafer with shearing stress from slab with curved portion (2003-08-05),
9. 6511902 - Fabrication method for forming rounded corner of contact window and via by two-step light etching technique (2003-01-28),
10. 6500767 - Method of etching semiconductor metallic layer (2002-12-31),
11. 6492214 - Method of fabricating an insulating layer (2002-12-10),

Title: The Innovations of Shin-Yi Tsai

Introduction

Shin-Yi Tsai is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor manufacturing, holding a total of 11 patents. His work focuses on innovative methods that enhance the efficiency and precision of semiconductor processes.

Latest Patents

Among his latest patents is a method for reducing dimensions between patterns on a hardmask. This semiconductor manufacturing method involves depositing a first layer over a substrate and providing a layer of hardmask over the first layer. The hardmask layer is then patterned and defined to form at least two hardmask structures, each featuring a substantially vertical sidewall and a horizontal top. The method ensures that the hardmask structures are separated by a first space, with a photo-insensitive material deposited over them. The amount of this material on the top of the hardmask structures is significantly greater than that on the sidewalls, resulting in a second space that is smaller than the first.

Another notable patent is a method for reducing dimensions between patterns on a photoresist. This process includes providing a substrate and a layer of material over it, followed by a layer of photoresist. The photoresist layer is patterned and defined, after which a conformal and photo-insensitive polymer layer is deposited. The final steps involve etching both the polymer layer and the underlying material layer.

Career Highlights

Shin-Yi Tsai is currently employed at Macronix International Co., Ltd., where he continues to innovate in semiconductor technology. His expertise and dedication have positioned him as a key figure in the industry, contributing to advancements that drive efficiency and performance in semiconductor manufacturing.

Collaborations

He has collaborated with notable colleagues, including Ming-Chung Liang and Henry Wei-Ming Chung, further enhancing the innovative environment at Macronix International Co., Ltd.

Conclusion

Shin-Yi Tsai's contributions to semiconductor manufacturing through his patents and collaborative efforts highlight his role as a leading inventor in the field. His innovative methods continue to shape the future of technology in significant ways.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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