Sheng Feng

This inventor holds 23 USPTO granted patents, primarily in Field-Programmable Gate Arrays. Top assignee: Actel Corporation, Inc.. Active years: 2001-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sheng Feng. Retrieved from https://idiyas.com/inventor/sheng-feng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23

% Patents Active = 78.3

Average Co-Inventor Count = 4.6

ph-index = 13

Forward Citations = 1,387(Granted Patents)

Company Filing History:

23 out of 463

Actel Corporation, Inc.

patents

Years Active: 2001-2008

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Areas of Expertise:

Field-Programmable Gate Array

Tileable Architecture

Inter-Tile Buffer

Routing Structures

Integrated Circuit

Programmable Logic Device

Freeway Routing

User Available Body Scan

23 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7426665 - Tileable field-programmable gate array architecture (2008-09-16),

2. 7342416 - Tileable field-programmable gate array architecture (2008-03-11),

3. 7157938 - Tileable field-programmable gate array architecture (2007-01-02),

4. 7137095 - Freeway routing system for a gate array (2006-11-14),

5. 7132853 - Inter-tile buffer system for a field programmable gate array (2006-11-07),

6. 7053653 - Inter-tile buffer system for a field programmable gate array (2006-05-30),

7. 7015719 - Tileable field-programmable gate array architecture (2006-03-21),

8. 6968487 - User available body scan chain (2005-11-22),

9. 6888375 - Tileable field-programmable gate array architecture (2005-05-03),

10. 6870396 - Tileable field-programmable gate array architecture (2005-03-22),

11. 6800884 - Inter-tile buffer system for a field programmable gate array (2004-10-05),

12. 6774672 - Field-programmable gate array architecture (2004-08-10),

13. 6774670 - Intra-tile buffer system for a field programmable gate array (2004-08-10),

14. 6774669 - Field programmable gate array freeway architecture (2004-08-10),

15. 6744278 - Tileable field-programmable gate array architecture (2004-06-01),

Title: Innovator Sheng Feng: Pioneering FPGA Technology

Introduction: Sheng Feng is a prominent inventor based in Cupertino, California, known for his significant contributions to the field of field-programmable gate arrays (FPGAs). With a total of 23 patents to his name, he is recognized for his innovative approach to FPGA architectures and testing methodologies.

Latest Patents: Among his latest inventions, Sheng Feng has developed a method for testing FPGA routing circuitry. This method involves providing a global control signal to simultaneously activate all programmable elements in multiple track sets, allowing for thorough validation of logic results against expected outcomes. Additionally, he has designed a tileable FPGA architecture featuring advanced configurations, including a plurality of functional groups (FGs) and routing conductors, which enhances signal routing and processing capabilities within the FPGA tile.

Career Highlights: Sheng Feng's career is marked by his tenure at Actel Corporation, Inc., where he has played a pivotal role in advancing FPGA technology. His extensive experience in the field has solidified his position as a leading figure in innovation and design within the semiconductor industry.

Collaborations: Throughout his career, Sheng has collaborated with notable colleagues such as Jung-Cheun Lien and Tong Liu. These partnerships have fostered a creative environment that has led to the successful development of transformative FPGA technologies.

Conclusion: With his remarkable achievements and ongoing contributions to FPGA technology, Sheng Feng continues to shape the future of digital design and semiconductor innovations. His work not only enhances current technology but also sets the foundation for future advancements in the field.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]