Tochigi, Japan

Seiji Yasumoto

This inventor holds 40 USPTO granted patents and 7 published patent applications and 1 EPO patent, primarily in Semiconductor Fabrication. Top assignees: Semiconductor Energy Laboratory Co., Ltd., Semiconductor Energy Laboratory Co., Ltd.. Active years: 2010-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seiji Yasumoto. Retrieved from https://idiyas.com/inventor/seiji-yasumoto

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 40 

% Patents Active = 60.0

 

Average Co-Inventor Count = 5.3

ph-index = 5

Forward Citations = 497(Granted Patents)


Company Filing History:


Years Active: 2010-2026

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Areas of Expertise:
Display Device
Semiconductor Device
Peeling Method
Manufacturing Method
Flexible Device
Adhesive Layer
Resin Layer
Light-Emitting Device
Separation Method
Electronic Device
Display Module
Data Processor
40 patents (USPTO):Explore Patents

Title: **Seiji Yasumoto: Innovator in Semiconductor Technology**

Introduction

Seiji Yasumoto, a prominent inventor based in Tochigi, Japan, stands out with an impressive portfolio of 38 patents. His work primarily focuses on advancements in semiconductor devices, which are essential in modern electronic applications. Yasumoto’s innovative approaches contribute significantly to the field, enhancing the reliability and efficiency of semiconductor technology.

Latest Patents

Among Yasumoto's latest inventions is a patent for a semiconductor device comprising an adhesive layer and a resin layer. This high-yield manufacturing method introduces a peeling step that enhances fabrication efficiency. The method involves stacking a first material layer and a second material layer over a substrate, followed by a unique separation approach using light irradiation at the interface. This improvement is critical for developing semiconductor devices with favorable electrical properties and stability. Another noteworthy patent describes a semiconductor device that incorporates a multi-layer insulating structure. It includes a semiconductor layer made from indium, gallium, and oxygen, designed for optimal electrical performance.

Career Highlights

Seiji Yasumoto is affiliated with Semiconductor Energy Laboratory Co., Ltd., a leading company in the semiconductor industry known for its pioneering research and development. His contributions to the design and fabrication of semiconductor devices have positioned him as a key figure in the field.

Collaborations

Throughout his career, Yasumoto has collaborated with notable colleagues such as Shunpei Yamazaki and Hiroki Adachi. These collaborations have fostered an environment of innovation, combining their expertise to push the boundaries of semiconductor technology further.

Conclusion

In summary, Seiji Yasumoto's exceptional work in semiconductor technology has not only resulted in numerous patents but also significantly impacted the industry. His innovative methodologies for fabricating semiconductor devices ensure that he remains a pivotal figure in the advancement of electronics, driving future developments in this critical field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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