The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Aug. 03, 2020
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Shunpei Yamazaki, Setagaya, JP;

Masataka Sato, Tochigi, JP;

Masakatsu Ohno, Utsunomiya, JP;

Seiji Yasumoto, Tochigi, JP;

Hiroki Adachi, Tochigi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/12 (2006.01); B23K 26/351 (2014.01); H01L 51/00 (2006.01); H01L 51/56 (2006.01); H01L 21/77 (2017.01);
U.S. Cl.
CPC ...
H01L 27/1262 (2013.01); B23K 26/351 (2015.10); H01L 27/127 (2013.01); H01L 51/0097 (2013.01); H01L 51/56 (2013.01); H01L 2021/775 (2013.01);
Abstract

A peeling method at low cost with high mass productivity is provided. A silicon layer having a function of releasing hydrogen by irradiation with light is formed over a formation substrate, a first layer is formed using a photosensitive material over the silicon layer, an opening is formed in a portion of the first layer that overlaps with the silicon layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the silicon layer, the silicon layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other.


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