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For the Inventor, By the Inventor

Ridgefield, CT, United States of America

Richard Stephen Wise

USPTO Granted Patents = 17 

Average Co-Inventor Count = 3.9

ph-index = 5

Forward Citations = 48(Granted Patents)


Location History:

  • Newburgh, NY (US) (2010 - 2014)
  • Ridgefield, CT (US) (2013 - 2020)

Company Filing History:

goldMedal14 out of 164,108 
 
International Business Machines Corporation
 patents
silverMedal5 out of 2,867 
 
Stmicroelectronics Gmbh
 patents
bronzeMedal2 out of 5,671 
 
Globalfoundries Inc.
 patents
4. 2 out of 1,016 
 
Globalfoundries Singapore Pte. Ltd.
 patents
where one patent can have more than one assignee

Years Active: 2010-2020

where 'Filed Patents' based on already Granted Patents

17 patents (USPTO):
1. 10546743 - Advanced interconnect with air gap (2020-01-28),
2. 9786551 - Trench structure for high performance interconnection lines of different resistivity and method of making same (2017-10-10),
3. 9658523 - Interconnect structure having large self-aligned vias (2017-05-23),
4. 9530665 - Protective trench layer and gate spacer in finFET devices (2016-12-27),
5. 9391020 - Interconnect structure having large self-aligned vias (2016-07-12),
6. 9214429 - Trench interconnect having reduced fringe capacitance (2015-12-15),
7. 9064848 - ARC residue-free etching (2015-06-23),
8. 8901006 - ARC residue-free etching (2014-12-02),
9. 8829612 - Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers (2014-09-09),
10. 8580628 - Integrated circuit contact structure and method (2013-11-12),
11. 8507375 - Alignment tolerant semiconductor contact and method (2013-08-13),
12. 8492295 - On-chip cooling for integrated circuits (2013-07-23),
13. 8298966 - On-chip cooling systems for integrated circuits (2012-10-30),
14. 8018005 - CMOS (complementary metal oxide semiconductor) devices having metal gate NFETs and poly-silicon gate PFETs (2011-09-13),
15. 7892928 - Method of forming asymmetric spacers and methods of fabricating semiconductor device using asymmetric spacers (2011-02-22),

Title: Richard Stephen Wise: Innovator in Integrated Circuit Technology

Introduction

Richard Stephen Wise is a prominent inventor based in Ridgefield, CT (US). He has made significant contributions to the field of integrated circuit technology, holding a total of 17 patents. His work focuses on enhancing the performance and stability of high-performance integrated circuits.

Latest Patents

One of Wise's latest patents is titled "Advanced interconnect with air gap." This innovation addresses the structural instability of ultra-low-k dielectric materials used in integrated circuits. By incorporating air gaps into a high modulus dielectric material, Wise's method maintains structural stability while reducing capacitance between adjacent nanowires. Another notable patent is "Trench structure for high performance interconnection lines of different resistivity and method of making same." This patent describes an integrated circuit design that utilizes trenches of varying depths to create interconnection lines with different resistivities, enhancing the overall performance of the circuit.

Career Highlights

Throughout his career, Richard Stephen Wise has worked with leading technology companies, including IBM and STMicroelectronics GmbH. His experience in these organizations has allowed him to develop and refine his innovative ideas in integrated circuit technology.

Collaborations

Wise has collaborated with notable professionals in the field, including John H. Zhang and Lawrence Alfred Clevenger. These collaborations have contributed to the advancement of his research and the successful development of his patents.

Conclusion

Richard Stephen Wise is a distinguished inventor whose work in integrated circuit technology has led to significant advancements in the field. His innovative patents and collaborations with industry leaders highlight his impact on modern technology.

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