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For the Inventor, By the Inventor

San Jose, CA, United States of America

Raghu Prabhakar

USPTO Granted Patents = 70 

 

 

Average Co-Inventor Count = 5.8

ph-index = 7

Forward Citations = 239(Granted Patents)

Forward Citations (Not Self Cited) = 176(Dec 10, 2025)


Location History:

  • Sunnyvale, CA (US) (2020 - 2024)
  • San Jose, CA (US) (2021 - 2024)

Company Filing History:

goldMedal70 out of 178 
 
Sambanova Systems, Inc.
 patents

Years Active: 2020-2025

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Areas of Expertise:
Reconfigurable Processors
Dataflow Architecture
Lossless Tiling
Convolution Networks
Fracturable Data Path
Tensor Dropout
Dynamic Data Structures
Compiler Flow Logic
Peer-to-Peer Communication
Sparse Matrix Multiplier
Control Flow Barrier
Streaming Write Functionality
70 patents (USPTO):Explore Patents
1. 12505066 - Execution state management (2025-12-23),
2. 12493337 - Integrated circuit that mitigates inductive-induced voltage droop (2025-12-09),
3. 12488218 - Lossless tiling in convolution networks—padding and re-tilling at section boundaries (2025-12-02),
4. 12487802 - Configuration file generation for fracturable data path in a coarse-grained reconfigurable processor (2025-12-02),
5. 12475524 - Dataflow architecture processor statically reconfigurable to perform N-dimensional affine transformation in parallel manner by replicating copies of input image across multiple scratchpad memories (2025-11-18),
6. 12475523 - Dataflow architecture processor statically reconfigurable to perform n-dimensional affine transformation (2025-11-18),
7. 12461778 - Multiple contexts for a memory unit in a reconfigurable data processor (2025-11-04),
8. 12436915 - Operating a cost estimation tool for placing and routing an operation unit graph on a reconfigurable processor (2025-10-07),
9. 12416961 - Integrated circuit that mitigates inductive-induced voltage droop using compute unit group identifiers (2025-09-16),
10. 12373182 - Compiler-based input synchronization for processor with variant stage latencies (2025-07-29),
11. 12332836 - Estimating a scaled cost of implementing an operation unit graph on a reconfigurable processor (2025-06-17),
12. 12321843 - Lossless tiling in convolution networks—data flow logic (2025-06-03),
13. 12314754 - Multiple contexts for a compute unit in a reconfigurable data processor (2025-05-27),
14. 12306788 - Reconfigurable dataflow unit with streaming write functionality (2025-05-20),
15. 12306783 - Top level network and array level network for reconfigurable data processors (2025-05-20),

Title: Raghu Prabhakar: Pioneering Inventor from San Jose

Introduction: Raghu Prabhakar is a renowned inventor based in San Jose, California, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Raghu Prabhakar holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his commitment to pushing the boundaries of technological advancement.

Career Highlights: With a career spanning over two decades, Raghu Prabhakar has worked with leading tech companies, research institutions, and universities, playing a key role in developing cutting-edge solutions that have revolutionized various industries.

Collaborations: Throughout his career, Raghu Prabhakar has collaborated with top engineers, scientists, and researchers, fostering a culture of innovation and knowledge sharing that has led to numerous successful projects and inventions.

Conclusion: Raghu Prabhakar's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and technologists, solidifying his legacy as a true pioneer in the world of technology.

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