The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

May. 13, 2024
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventors:

Manish K. Shah, Austin, TX (US);

Ram Sivaramakrishnan, San Jose, CA (US);

Mark Luttrell, Palo Alto, CA (US);

David B. Jackson, Dana Point, CA (US);

Raghu Prabhakar, San Jose, CA (US);

Sumti Jairath, Palo Alto, CA (US);

Gregory Frederick Grohoski, Bee Cave, TX (US);

Pramod Nataraja, San Jose, CA (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/24 (2006.01); G06F 9/445 (2018.01); G06F 13/364 (2006.01); G06F 15/78 (2006.01); G06F 8/65 (2018.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 15/7871 (2013.01); G06F 9/44505 (2013.01); G06F 13/364 (2013.01); G06F 8/65 (2013.01); G06F 9/4411 (2013.01);
Abstract

A method and system for unloading configuration data in a reconfigurable processor array comprises a bus system, and array of processor units connected to bus system, the processor units in the array including configuration data stores to store unit files comprising plurality of subfiles of configuration data particular to corresponding processor units. A configuration unload controller is connected to the bus system, including logic to execute an array configuration unload process, including distributing a command to plurality of the processor units in array to unload the unit files particular to corresponding processor units, the unit files each comprising plurality of ordered sub-files, receiving sub-files via bus system from the array of process units, and assembling an unload configuration file by arranging the received subfiles in memory according to the process unit of the unit file of which the subfile is a part, and order of the subfile in unit file.


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