The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 02, 2025
Filed:
Jun. 30, 2021
Sambanova Systems, Inc., Palo Alto, CA (US);
Tejas Nagendra Babu Nama, Sunnyvale, CA (US);
Ruddhi Chaphekar, Santa Clara, CA (US);
Ram Sivaramakrishnan, San Jose, CA (US);
Raghu Prabhakar, San Jose, CA (US);
Sumti Jairath, Santa Clara, CA (US);
Junjue Wang, San Mateo, CA (US);
Kaizhao Liang, Palo Alto, CA (US);
Adi Fuchs, West Windsor, NJ (US);
Matheen Musaddiq, Austin, TX (US);
Arvind Krishna Sujeeth, San Francisco, CA (US);
SambaNova Systems, Inc., Palo Alto, CA (US);
Abstract
Disclosed is a method that includes generating by an output processing node of a first section of a processing graph, a plurality of output tiles of an output tensor. The plurality of output tiles of the output tensor is written in a memory, where the writing includes zero-padding the plurality of output tiles of the output tensor in the memory. The zero-padded plurality of output tiles of the output tensor are tiled, to generate a plurality of input tiles of an input tensor. The plurality of input tiles of the input tensor is processed in a second section of the processing graph.