The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Apr. 08, 2023
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventors:

Darshan Gandhi, Palo Alto, CA (US);

Manish K. Shah, Austin, TX (US);

Raghu Prabhakar, San Jose, CA (US);

Gregory Frederick Grohoski, Bee Cave, TX (US);

Youngmoon Choi, Milpitas, CA (US);

Jinuk Shin, San Jose, CA (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/30 (2006.01); G06F 1/32 (2019.01); G06F 1/3206 (2019.01); G06F 1/324 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3206 (2013.01); G06F 1/305 (2013.01); G06F 1/324 (2013.01);
Abstract

An integrated circuit (IC) includes an array of compute units and control circuitry for mitigating supply voltage overshoot. Each compute unit contributes to an aggregate time rate of change of current drawn by the IC when transitioning between processing and non-processing states. The control circuitry is configurable to stagger when each compute unit is eligible to transition from processing data to not processing data relative to other compute units, thereby limiting the negative rate of change of current through inductive loads of the IC and preventing voltage overshoot above a maximum threshold. The control circuitry may be distributed among the compute units and configured using statically reconfigurable parameters that specify the maximum number of compute units permitted to transition concurrently and the minimum number of clock cycles between successive group transitions.


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