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For the Inventor, By the Inventor

San Jose, CA, United States of America

Prashant B Phatak

This inventor holds 88 USPTO granted patents and 13 published patent applications and 1 EPO patent, primarily in Non-Volatile Memory (CPC class H01L45-1233). Top assignee: Intermolecular, Inc.. Active years: 2009-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Prashant B Phatak. Retrieved from https://idiyas.com/inventor/prashant-b-phatak

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 88 

% Patents Active = 35.2


Average Co-Inventor Count = 2.9

ph-index = 11

Forward Citations = 569(Granted Patents)

Forward Citations (Not Self Cited) = 535(Dec 10, 2025)


Inventors with similar research interests:

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Company Filing History:

goldMedal88 out of 726 
 
Intermolecular, Inc.
 patents

Years Active: 2009-2017

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Areas of Expertise:
Resistive-Switching
Non-Volatile Memory
Selector Device
ALD Processing
Forming Voltage
MIMCAP Diode
Doped Electrode
Thermal Sink
Defect Engineering
Cross-Bar Array
Dielectric Doping
Memory Elements
88 patents (USPTO):Explore Patents
1. 9761800 - Method for reducing forming voltage in resistive random access memory (2017-09-12),
2. 9443906 - TiOx based selector element (2016-09-13),
3. 9397141 - Current selector for non-volatile memory in a cross bar array based on defect and band engineering metal-dielectric-metal stacks (2016-07-19),
4. 9368721 - Diamond like carbon (DLC) as a thermal sink in a selector stack for non-volatile memory application (2016-06-14),
5. 9362497 - Reduction of forming voltage in semiconductor devices (2016-06-07),
6. 9343523 - Selector device using low leakage dielectric MIMCAP diode (2016-05-17),
7. 9337238 - Photo-induced MSM stack (2016-05-10),
8. 9318546 - Doped electrode for DRAM capacitor stack (2016-04-19),
9. 9276211 - Non-volatile resistive-switching memories (2016-03-01),
10. 9252360 - ALD processing techniques for forming non-volatile resistive switching memories (2016-02-02),
11. 9246092 - Tunneling barrier creation in MSM stack as a selector device for non-volatile memory application (2016-01-26),
12. 9178149 - Surface treatment to improve resistive-switching characteristics (2015-11-03),
13. 9177998 - Method of forming an asymmetric MIMCAP or a Schottky device as a selector element for a cross-bar memory array (2015-11-03),
14. 9147841 - Resistive-switching memory element (2015-09-29),
15. 9070867 - Non-volatile resistive-switching memories (2015-06-30),

Title: Innovation Trailblazer: Prashant B Phatak

Introduction: Prashant B Phatak is a prolific inventor based in San Jose, CA, whose groundbreaking work has led to the development of 88 patents in the field of technology and electronics.

Latest Patents:

1. Method for reducing forming voltage in resistive random access memory: Phatak's innovative method focuses on reducing forming voltage in resistive random access memory, crucial for enhancing memory device efficiency.

2. TiOx-based selector element: His work on control elements for nonvolatile memory devices demonstrates a balance between low leakage currents at low voltages and high leakage currents at high voltages, optimizing device performance.

Career Highlights: Phatak is currently contributing his expertise to Intermolecular, Inc., a leading company in the technology sector. His role involves spearheading innovative projects and driving technological advancements within the organization.

Collaborations: Phatak has collaborated closely with esteemed colleagues such as Tony P Chiang and Pragati Kumar, fostering a dynamic environment for idea exchange and technological growth within the company.

Conclusion: Prashant B Phatak's relentless pursuit of innovation and his remarkable contributions to the field of technology through numerous patents underscore his position as a pioneering inventor in the industry. His work continues to push boundaries and shape the future of electronic devices and memory technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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