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San Jose, CA, United States of America

Paul G Davis

USPTO Granted Patents = 52 (Patent Applications = 2)

Average Co-Inventor Count = 4.9

ph-index = 20

Forward Citations = 1,691(Granted Patents)

Forward Citations (Not Self Cited) = 1,531(Dec 10, 2025)

Inventors with similar research interests:

Company Filing History:

48 out of 2,868

1 out of 54,781

Intel Corporation

4. 1 out of 1,347

Microchip Technology Inc.

5. 2 out of 832,891

Other

patents

where one patent can have more than one assignee

Years Active: 1999-2014

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Areas of Expertise:

Dynamic Random Access Memory

Memory Controller

Synchronous Memory System

Power Down Mode

Integrated Circuit Memory

Memory Write Signaling

Configurable Oscillator

Two Step Memory Write Operations

Phase Comparator

High Performance Memory

Low Power Interface

Information Transfer Optimization

52 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8756395 - Controlling DRAM at time DRAM ready to receive command when exiting power down (2014-06-17),

2. 8589717 - Serial peripheral interface (2013-11-19),

3. 8560797 - Method and apparatus for indicating mask information (2013-10-15),

4. 8504790 - Memory component having write operation with multiple time periods (2013-08-06),

5. 8296540 - Method and apparatus for adjusting the performance of a synchronous memory system (2012-10-23),

6. 8205056 - Memory controller for controlling write signaling (2012-06-19),

7. 8140805 - Memory component having write operation with multiple time periods (2012-03-20),

8. 8127152 - Method of operation of a memory device and system including initialization at a first frequency and operation at a second frequency and a power down exit mode (2012-02-28),

9. 8019958 - Memory write signaling and methods thereof (2011-09-13),

10. 7870357 - Memory system and method for two step memory write operations (2011-01-11),

11. 7861030 - Method and apparatus for updating data in ROM using a CAM (2010-12-28),

12. 7793039 - Interface for a semiconductor memory device and method for controlling the interface (2010-09-07),

13. 7581121 - System for a memory device having a power down mode and method (2009-08-25),

14. 7574616 - Memory device having a power down exit register (2009-08-11),

15. 7571330 - System and module including a memory device having a power down mode (2009-08-04),

Title: Spotlight on Inventor Paul G Davis from San Jose, CA

Introduction:

Inventor Paul G Davis is a talented individual based in San Jose, CA, with a remarkable track record in the field of innovation. With an impressive portfolio of 52 patents to his name, Paul has made significant contributions to the world of technology.

Latest Patents:

Paul's latest patents showcase his expertise in the realm of memory devices and systems. One of his recent inventions includes a method for Controlling DRAM to optimize performance during initialization and memory access operations. Another notable patent is related to a Serial Peripheral Interface for enhancing data retrieval from external memory devices.

Career Highlights:

Paul G Davis has honed his skills and expertise while working at renowned companies such as Rambus Inc. His innovative spirit and dedication to pushing the boundaries of technology have led to the development of groundbreaking solutions in the semiconductor industry.

Collaborations:

Throughout his career, Paul has collaborated with esteemed professionals in the field, including coworkers like Craig Edward Hampel and Richard Maurice Barth. These collaborations have fostered a culture of creativity and innovation, resulting in the successful implementation of cutting-edge technologies.

Conclusion:

Inventor Paul G Davis continues to make waves in the world of patents and inventions, with his groundbreaking work in memory systems and interfaces. His dedication to excellence and his passion for innovation make him a noteworthy figure in the realm of technology.

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