IDiyas

For the Inventor, By the Inventor

Lake Oswego, OR, United States of America

Neal Patrick Callan

USPTO Granted Patents = 22 

Average Co-Inventor Count = 3.6

ph-index = 6

Forward Citations = 130(Granted Patents)


Company Filing History:

goldMedal8 out of 3,715 
 
Lsi Logic Corporation
 patents
silverMedal8 out of 2,353 
 
Lsi Corporation
 patents
bronzeMedal6 out of 4,883 
 
Asml Netherlands B.v.
 patents
4. 1 out of 618 
 
Asml Holding N.v.
 patents
5. 1 out of 1,813 
 
Avago Technologies General IP (singapore) Pte. Ltd.
 patents
where one patent can have more than one assignee

Years Active: 2004-2024

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22 patents (USPTO):
1. 12067340 - Computational wafer inspection (2024-08-20),
2. 11080459 - Computational wafer inspection (2021-08-03),
3. 10579772 - Computational wafer inspection (2020-03-03),
4. 9990462 - Computational wafer inspection (2018-06-05),
5. 9507907 - Computational wafer inspection (2016-11-29),
6. 9188848 - Maskless vortex phase shift optical direct write lithography (2015-11-17),
7. 8377633 - Maskless vortex phase shift optical direct write lithography (2013-02-19),
8. 8057963 - Maskless vortex phase shift optical direct write lithography (2011-11-15),
9. 8015540 - Method and system for reducing inter-layer capacitance in integrated circuits (2011-09-06),
10. 7738078 - Optimized mirror design for optical direct write (2010-06-15),
11. 7499146 - Lithographic apparatus and device manufacturing method, an integrated circuit, a flat panel display, and a method of compensating for cupping (2009-03-03),
12. 7396760 - Method and system for reducing inter-layer capacitance in integrated circuits (2008-07-08),
13. 7376260 - Method for post-OPC multi layer overlay quality inspection (2008-05-20),
14. 7372547 - Process and apparatus for achieving single exposure pattern transfer using maskless optical direct write lithography (2008-05-13),
15. 7313508 - Process window compliant corrections of design layout (2007-12-25),

Title: Inventor Spotlight: Neal Patrick Callan

Introduction:

Neal Patrick Callan, an innovative inventor hailing from Lake Oswego, OR, has made significant contributions to the field of computational wafer inspection. With a total of 21 patents to his name, Neal Patrick Callan's expertise lies in developing defect prediction methods for device manufacturing processes.

Latest Patents:

Among his recent patents is a cutting-edge computational wafer inspection method. This method involves processing a portion of a design layout onto a substrate, identifying hot spots, determining processing parameter values, and predicting the existence or characteristics of defects produced during the manufacturing process.

Career Highlights:

Neal Patrick Callan has honed his skills and expertise while working at prestigious companies such as LSI Logic Corporation and LSI Corporation. His innovative approach to defect prediction has revolutionized the device manufacturing industry, earning him recognition as a trailblazer in the field.

Collaborations:

Throughout his career, Neal Patrick Callan has collaborated with esteemed professionals in the industry. Some of his notable coworkers include Nicholas K Eib and Ebo H Croffie, who have also made significant contributions to the field of computational wafer inspection.

Conclusion:

In conclusion, Neal Patrick Callan's exceptional work in the realm of computational wafer inspection has cemented his reputation as a pioneering inventor. His dedication to developing cutting-edge defect prediction methods underscores his commitment to advancing technology in the manufacturing sector.

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