The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2011

Filed:

May. 30, 2008
Applicants:

Kunal N. Taravade, Portland, OR (US);

Neal Callan, Lake Oswego, OR (US);

Paul G. Filseth, Los Gatos, CA (US);

Inventors:

Kunal N. Taravade, Portland, OR (US);

Neal Callan, Lake Oswego, OR (US);

Paul G. Filseth, Los Gatos, CA (US);

Assignee:

LSI Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is directed to a method and system of intelligent dummy filling placement to reduce inter-layer capacitance caused by overlaps of dummy filling area on successive layers. The method and system treats each consecutive pair of layers together so as to minimize dummy filling overlaps between each layer. In particular, dummy fill features on each layer may be placed in a checkerboard pattern to avoid overlaps. As such, the present invention may eliminate large overlap area of the dummy patterns on consecutive layers by utilizing intelligent dummy filling placement.


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