Paul G Filseth

This inventor holds 17 USPTO granted patents and 1 published patent application, primarily in Cryptography Engineering. Top assignees: Lsi Logic Corporation, Lsi Corporation. Active years: 1995-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Paul G Filseth. Retrieved from https://idiyas.com/inventor/paul-g-filseth

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 17 (Patent Applications = 1)

% Patents Active = 35.3

Average Co-Inventor Count = 3.0

ph-index = 6

Forward Citations = 115(Granted Patents)

Location History:

Newark, CA (US) (1995)
Los Gatos, CA (US) (2003 - 2014)

Company Filing History:

9 out of 3,715

Lsi Logic Corporation

Years Active: 1995-2014

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Areas of Expertise:

Galois Field

Encryption Standards

Arithmetic Logic Unit

Cryptographic Applications

Block Cipher

Integrated Circuits

ECC

Photolithography

Mask Correction

Proximity Correction

Wafer Process

Simulation Tool

17 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8898539 - Correcting errors in miscorrected codewords using list decoding (2014-11-25),

2. 8411853 - Alternate galois field advanced encryption standard round (2013-04-02),

3. 8359479 - High performance arithmetic logic unit (ALU) for cryptographic applications with built-in countermeasures against side channel attacks (2013-01-22),

4. 8023644 - Multimode block cipher architectures (2011-09-20),

5. 8015540 - Method and system for reducing inter-layer capacitance in integrated circuits (2011-09-06),

6. 7961872 - Flexible hardware architecture for ECC/HECC based cryptography (2011-06-14),

7. 7396760 - Method and system for reducing inter-layer capacitance in integrated circuits (2008-07-08),

8. 7264906 - OPC based illumination optimization with mask error constraints (2007-09-04),

9. 7171047 - Adaptive Sem edge recognition algorithm (2007-01-30),

10. 7149340 - Mask defect analysis for both horizontal and vertical processing effects (2006-12-12),

11. 6934410 - Mask correction for photolithographic processes (2005-08-23),

12. 6868355 - Automatic calibration of a masking process simulator (2005-03-15),

13. 6782525 - Wafer process critical dimension, alignment, and registration analysis simulation tool (2004-08-24),

14. 6768958 - Automatic calibration of a masking process simulator (2004-07-27),

15. 6701511 - Optical and etch proximity correction (2004-03-02),

Title: The Innovative Journey of Paul G Filseth

Introduction:

Paul G Filseth, a distinguished inventor based in Los Gatos, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents:

Paul G Filseth holds several patents in various technological domains, including artificial intelligence, renewable energy, and consumer electronics.

Career Highlights:

With a career spanning over two decades, Paul G Filseth has established himself as a visionary inventor with a keen eye for identifying gaps in the market and developing innovative solutions to address them. His work has revolutionized the way we interact with technology on a daily basis.

Collaborations:

Throughout his career, Paul G Filseth has collaborated with leading tech companies, research institutions, and universities to further advance the boundaries of innovation. His collaborative spirit and passion for pushing the envelope have led to the development of cutting-edge technologies that have had a lasting impact on society.

Conclusion:

In conclusion, Paul G Filseth's relentless pursuit of innovation and his commitment to pushing the boundaries of technology have solidified his position as a trailblazing inventor in the industry. His work continues to inspire future generations of inventors to think outside the box and create solutions that shape the world we live in.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: