The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2011
Filed:
Dec. 04, 2007
Anatoli A. Bolotov, Cupertino, CA (US);
Mlkhail I. Grinchuk, San Jose, CA (US);
Paul G. Filseth, Los Gatos, CA (US);
Lav D. Ivanovic, Sunnyvale, CA (US);
Anatoli A. Bolotov, Cupertino, CA (US);
Mlkhail I. Grinchuk, San Jose, CA (US);
Paul G. Filseth, Los Gatos, CA (US);
Lav D. Ivanovic, Sunnyvale, CA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A circuit for implementing elliptic curve and hyperelliptic curve encryption and decryption operations, having a read only memory with no more than about two kilobytes of accessible memory, containing first programming instructions. An arithmetic logic unit has access to second programming instructions that are resident in a gate-level program disposed in the arithmetic logic unit, and is operable to receive data from no more than one input FIFO register. A microcontroller has no more than about two thousand gates, and is adapted to read the first programming instructions from the read only memory, send control signals to the arithmetic logic unit, and receive flags from the arithmetic logic unit. The arithmetic unit reads the third programming instructions, selectively performs elliptic curve and hyperelliptic curve encryption and decryption operations on the data according to the second programming instructions and the microcontroller, and sends output to no more than one output FIFO register.