San Jose, CA, United States of America

Naveen Kumar

This inventor holds 125 USPTO granted patents and 5 published patent applications and 3 EPO patents, primarily in NAND Memory Systems (CPC class G11C29-52). Top assignees: Skhynix Inc., Google Inc., Intel Corporation. Active years: 2014-2026.

USPTO Granted Patents = 125 

% Patents Active = 92.8


Average Co-Inventor Count = 3.4

ph-index = 9

Forward Citations = 454(Granted Patents)

Forward Citations (Not Self Cited) = 362(Dec 10, 2025)


Inventors with similar research interests:

🔬 See more inventors

Location History:

  • Bengaluru, IN (2019 - 2023)
  • San Jose, CA (US) (2014 - 2024)

Company Filing History:


Years Active: 2014-2026

Loading Chart...
Loading Chart...
Areas of Expertise:
Bit Flipping Decoder
Error Recovery
NAND Storage
Adaptive Algorithms
Data Storage Device
Hardware Optimization
Context-Based Recovery
Deep Learning
Synchronous Event Collection
Memory System
Resource Optimization
Container-Based Processing
125 patents (USPTO):Explore Patents

Title: The Inventive Journey of Naveen Kumar: Pioneering Innovations in LDPC Decoding

Introduction:

Naveen Kumar, a brilliant inventor based in San Jose, CA, has made remarkable contributions to the field of LDPC decoding. With a total of 124 patents under his belt, Naveen Kumar stands out as a trailblazer in the realm of communication technologies.

Latest Patents:

1. Bit Flipping Decoder using Channel Information: Naveen Kumar's patent introduces an LDPC decoder that leverages channel information to execute a bit flipping algorithm for correcting unsatisfied checks in reference to a parity matrix H. The innovative aspect lies in the adaptive threshold condition determination, influenced by channel data, iteration count, and previous bit flipping history.

2. Iteration Dependent Bitwise Bit Flipping Decoder: Another groundbreaking patent by Naveen Kumar focuses on an LDPC decoder that refines the bit flipping process using channel details. The dynamic threshold determination, varying with the iteration count and prior bit flips, enhances error correction efficiency. The incorporation of a parameter binning technique adds a layer of hardware simplification.

Career Highlights:

During his professional journey, Naveen Kumar has showcased his expertise at renowned companies such as SK hynix Inc. and Google Inc. His adeptness in innovation and commitment to excellence have left a lasting impact on the industry.

Collaborations:

Naveen Kumar has collaborated with esteemed peers in the field, including Aman Bhatia and Fan Zhang. Together, they have pushed the boundaries of LDPC decoding technologies, fostering a culture of innovation and collaboration.

Conclusion:

In conclusion, Naveen Kumar's inventive spirit and technical acumen have propelled him to the forefront of LDPC decoding advancements. With a robust portfolio of patents and a track record of success at top-tier companies, Naveen Kumar continues to shape the landscape of communication technologies with his cutting-edge solutions.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to [email protected]
Loading…