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For the Inventor, By the Inventor

Clifton Park, NY, United States of America

Manjunatha Govinda Prabhu

This inventor holds 38 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Globalfoundries Inc., Globalfoundries Singapore Pte. Ltd., Globalfoundries U.S. Inc.. Active years: 2014-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Manjunatha Govinda Prabhu. Retrieved from https://idiyas.com/inventor/manjunatha-govinda-prabhu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 38

% Patents Active = 76.3

Average Co-Inventor Count = 3.7

ph-index = 4

Forward Citations = 58(Granted Patents)


Location History:

  • Maita, NY (US) (2015)
  • Singapore, SG (2014 - 2019)
  • Malta, NY (US) (2016 - 2020)
  • Clifton Park, NY (US) (2018 - 2023)
  • Halfmoon, NY (US) (2024)

Company Filing History:

goldMedal18 out of 5,671 
 
Globalfoundries Inc.
 patents
silverMedal11 out of 1,062 
 
Globalfoundries Singapore Pte. Ltd.
 patents
bronzeMedal7 out of 1,092 
 
Globalfoundries U.S. Inc.
 patents
4. 1 out of 1,237 
 
Marvell Asia Pte., Ltd.
 patents
5. 1 out of 5,162 
 
Marvell International Limited
 patents

Years Active: 2014-2025

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Areas of Expertise:
Semiconductor Device
Electrostatic Discharge
Planar Transistor
Integrated Circuit
2D Material
MOSFET
Schottky Rectifier
Floating ESD Node
Charge Device Model
High Voltage Applications
Transistor Fabrication
Lateral Bipolar Transistors
38 patents (USPTO):Explore Patents
1. 12356675 - Planar transistor device comprising at least one layer of a two-dimensional (2D) material (2025-07-08),
2. 12046670 - Semiconductor device having a gate contact over an active region (2024-07-23),
3. 11610843 - Well tap for an integrated circuit product and methods of forming such a well tap (2023-03-21),
4. 11581430 - Planar transistor device comprising at least one layer of a two-dimensional (2D) material and methods for making such transistor devices (2023-02-14),
5. 11239087 - Fully depleted devices with slots in active regions (2022-02-01),
6. 11177182 - Vertical transistor device comprising a two-dimensional (2D) material positioned in a channel region of the device and methods of making such vertical transistor devices (2021-11-16),
7. 11094791 - Vertical transistor device with source/drain regions comprising a twi-dimensional (2D) material and methods of making such vertical transistor devices (2021-08-17),
8. 11036913 - Integrated circuit methods using single-pin imaginary devices (2021-06-15),
9. 10819110 - Electrostatic discharge protection device (2020-10-27),
10. 10790276 - Methods, apparatus, and system for metal-oxide-semiconductor field-effect transistor (MOSFET) with electrostatic discharge (ESD) protection (2020-09-29),
11. 10741542 - Transistors patterned with electrostatic discharge protection and methods of fabrication (2020-08-11),
12. 10579774 - Integrated circuit (IC) design systems and methods using single-pin imaginary devices (2020-03-03),
13. 10529704 - Auxiliary gate antenna diodes (2020-01-07),
14. 10497576 - Devices with slotted active regions (2019-12-03),
15. 10381826 - Integrated circuit electrostatic discharge protection (2019-08-13),

Title: Manjunatha Govinda Prabhu: A Pioneer in Semiconductor Innovations

Introduction

Manjunatha Govinda Prabhu, based in Clifton Park, NY, is a prominent inventor in the field of semiconductor technology. With an impressive portfolio of 37 patents, he has made significant contributions to the development and optimization of semiconductor devices. His ingenuity has played a vital role in advancing the functionality and efficiency of modern electronic components.

Latest Patents

Among his latest inventions, Manjunatha has developed a patent for a **semiconductor device having a gate contact over an active region**. This device features a unique design where the gate comprises side portions and a middle portion, with the middle portion arranged between the side sections. Notably, the middle portion is horizontally wider than the side portions, which enhances its functionality over the active region.

Another significant patent focuses on a **well tap for an integrated circuit product** along with methods for forming such a well tap. The device includes a doped well region with a conductive well tap that is coupled to this region. This design incorporates a first sidewall spacer and a second sidewall spacer with varying vertical heights, showcasing innovative engineering in semiconductor architecture.

Career Highlights

Manjunatha Govinda Prabhu's career includes substantial experience with **Globalfoundries Inc.** and **Globalfoundries Singapore Pte. Ltd.**. His work in these reputable organizations has significantly informed and enhanced his innovations, positioning him as a leading figure in semiconductor technology.

Collaborations

Throughout his career, Manjunatha has collaborated with talented professionals, including Mahadeva Iyer Natarajan and Chien-Hsin Lee. These partnerships have fostered a collaborative environment that drives innovation and technical advancement in their projects.

Conclusion

With 37 patents to his name, Manjunatha Govinda Prabhu exemplifies excellence in semiconductor innovations. His latest patents reflect his commitment to advancing technology in this crucial field. By collaborating with industry peers and contributing to leading companies, he continues to shape the landscape of semiconductor device engineering.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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