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For the Inventor, By the Inventor

Hillsboro, OR, United States of America

Loren McLaury

USPTO Granted Patents = 19

Average Co-Inventor Count = 1.6

ph-index = 6

Forward Citations = 65(Granted Patents)


Company Filing History:

goldMedal18 out of 755 
 
Lattice Semiconductor Corporation
 patents
silverMedal1 out of 1 
 
Lallice Semiconductor Corporation
 patent

Years Active: 2001-2022

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19 patents (USPTO):Explore Patents
1. 11316521 - Power supply regulation for programmable logic devices (2022-04-26),
2. 10417078 - Deterministic read back and error detection for programmable logic devices (2019-09-17),
3. 9542993 - Leakage-current abatement circuitry for memory arrays (2017-01-10),
4. 9286952 - SRAM with two-level voltage regulator (2016-03-15),
5. 9191022 - Leakage-current abatement circuitry for memory arrays (2015-11-17),
6. 8553463 - Voltage discharge circuit having divided discharge current (2013-10-08),
7. 8522126 - Blocking memory readback in a programmable logic device (2013-08-27),
8. 8477549 - Triggered sense amplifier (2013-07-02),
9. 8059470 - Flash memory array with independently erasable sectors (2011-11-15),
10. 7944765 - Programmable logic device with built in self test (2011-05-17),
11. 7636259 - Flash memory array with independently erasable sectors (2009-12-22),
12. 7630259 - Programmable logic device with built in self test (2009-12-08),
13. 7605602 - Low-power output driver buffer circuit (2009-10-20),
14. 7512015 - Negative voltage blocking for embedded memories (2009-03-31),
15. 7484144 - Testing embedded memory in an integrated circuit (2009-01-27),

Title: The Innovative Contributions of Loren McLaury

Introduction

Loren McLaury, based in Hillsboro, OR, is a prominent inventor with an impressive portfolio of 19 patents. His work primarily focuses on advancements in programmable logic devices (PLDs), contributing to significant developments in power supply regulation and error detection technologies.

Latest Patents

Two of Loren's latest patents illustrate his innovative approach to enhancing programmable logic devices. The first, titled "Power Supply Regulation for Programmable Logic Devices," introduces various techniques for implementing power supply regulation. This method allows configuration memory cells of a PLD to be powered by different voltage levels during various operational states, thereby improving efficiency and performance.

The second patent, "Deterministic Read Back and Error Detection for Programmable Logic Devices," outlines techniques for implementing deterministic read-back capabilities and enhanced error detection mechanisms. This includes a unique design of memory cells arranged in an array equipped with an enable bit, enabling selective assertion and efficient data retrieval.

Career Highlights

Loren McLaury has contributed his expertise to notable companies such as Lattice Semiconductor Corporation and Lallice Semiconductor Corporation. His career has been marked by a commitment to exploring the potential of programmable logic technologies, resulting in several influential patents that address contemporary challenges in the field.

Collaborations

Throughout his career, Loren has worked alongside skilled professionals like Wei Han and Zheng Chen. These collaborations have fostered an environment of innovation, combining their expertise to push the boundaries of technology and further the development of programmable logic devices.

Conclusion

Loren McLaury stands out as a key figure in the realm of programmable logic devices, with a rich legacy of patents showcasing his innovative spirit. His contributions continue to impact the industry, paving the way for future advancements in power supply regulation and error detection technologies within programmable logic systems.

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