The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2022
Filed:
Dec. 08, 2020
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Loren McLaury, Hillsboro, OR (US);
Lattice Semiconductor Corporation, Portland, OR (US);
Abstract
Various techniques are provided to implement power supply regulation for programmable logic devices (PLDs). In one example, a method includes powering configuration memory cells of a PLD with a first voltage. The method further includes configuring the configuration memory cells while the configuration memory cells are powered by the first voltage. The method further includes operating the PLD while the configuration memory cells are powered with a second voltage higher than the first voltage. The method further includes powering the configuration memory cells with a third voltage lower than the first voltage in response to an indication to transition the PLD to a sleep mode of the PLD. Related systems and devices are provided.