The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2011
Filed:
Nov. 25, 2009
Wei Han, Beaverton, OR (US);
Yoshita Yerramilli, Hillsboro, OR (US);
Loren Mclaury, Hillsboro, OR (US);
Warren Juenemann, Cornelius, OR (US);
Wei Han, Beaverton, OR (US);
Yoshita Yerramilli, Hillsboro, OR (US);
Loren McLaury, Hillsboro, OR (US);
Warren Juenemann, Cornelius, OR (US);
Lattice Semiconductor Corporation, Hillsboro, OR (US);
Abstract
In one embodiment of the invention, an integrated circuit such as a programmable logic device includes volatile memory, nonvolatile memory, and a data shift register for reading data from the nonvolatile memory and for reading data from and writing data to the volatile memory. A built in self test (BIST) circuit is operable to test the nonvolatile memory without the data shift register reading data from the nonvolatile memory. The BIST circuit may include a finite state machine for performing at least one of the following tests on the nonvolatile memory: bulk erase, bulk program; margin bulk program; and/or margin bulk erase. A memory controller responsive to the finite state machine is operable to write data to and read data from the nonvolatile memory during testing of the nonvolatile memory.