Boise, ID, United States of America

Kevin G Duesman

This inventor holds 141 USPTO granted patents, primarily in Semiconductor Devices (CPC class H01L25-0657). Top assignees: Micron Technology Incorporated, Micron Semiconductor, Inc., Intel Corporation. Active years: 1991-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kevin G Duesman. Retrieved from https://idiyas.com/inventor/kevin-g-duesman

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 85.1

Average Co-Inventor Count = 2.3

ph-index = 25

Forward Citations = 2,251(Granted Patents)

Forward Citations (Not Self Cited) = 2,143(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:


Years Active: 1991-2023

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Areas of Expertise:
Semiconductor Devices
3D Inductive Structures
Package-Level Configurability
Through Silicon Vias
Memory Device
Random Access Memory
Integrated Circuit Testing
Photolithographic Processing
Nanotube Technology
Dynamic Circuit Clusters
Resistive Memory Sensing
141 patents (USPTO):Explore Patents

Title: Kevin G Duesman: Pioneering Innovator in Semiconductor Devices

Introduction:

Kevin G Duesman, hailing from Boise, ID, is a prominent inventor and scientific mind in the field of semiconductor technology. With an impressive portfolio boasting 127 patents, Duesman has made significant contributions in the development of cutting-edge semiconductor devices. His latest patents, pertaining to 3-dimensional inductive structures and package-level configurability, have gained considerable attention in the industry. Let's explore Duesman's remarkable career highlights and collaborations in this article.

Latest Patents:

Duesman's recent patents demonstrate his expertise in the design of advanced semiconductor devices. The first patent, "Semiconductor devices having 3-dimensional inductive structures," focuses on integrating inductive components into semiconductor devices. By incorporating a stack of alternating layers of oxide material and conductive coils, this innovation enables the creation of efficient and compact inductive structures. The second patent, "Semiconductor devices with through silicon vias and package-level configurability," introduces a novel approach to semiconductor device assembly. The invention allows for the electrical coupling of active and passive circuit elements through strategically positioned contact pads and through silicon vias (TSVs). This breakthrough promotes improved functionality and versatility in semiconductor systems.

Career Highlights:

Throughout his career, Duesman has made significant contributions to the field of semiconductor technology. He has worked with renowned companies such as Micron Technology Incorporated. Micron Technology, a leading producer of memory and storage solutions, has undoubtedly benefited from Duesman's innovative ideas and technological advancements. Duesman's contributions have strengthened Micron's position as a key player in the semiconductor industry. Additionally, he has had the opportunity to collaborate with exceptional professionals who share his passion for driving innovation forward.

Collaborations:

One of Duesman's notable collaborations includes working alongside Warren M Farnworth. Farnworth, a respected engineer, has contributed to numerous advancements in semiconductor technologies and holds his own portfolio of patents. Together, Duesman and Farnworth have leveraged their expertise to create revolutionary solutions in the field.

Another significant collaboration in Duesman's career involves Stephen L Casper. Casper is recognized for his contributions in areas such as advanced materials and device packaging. The collaboration between Duesman and Casper has resulted in synergistic outcomes, pushing the boundaries of semiconductor device design.

Conclusion:

Kevin G Duesman stands out as an exceptional innovator in the field of semiconductor devices. With 127 patents to his name, his contributions have propelled the evolution of this technology. Through his recent patents focusing on 3-dimensional inductive structures and package-level configurability, Duesman has captured the industry's attention. His career highlights with Micron Technology Incorporated and collaborations with accomplished professionals like Warren M Farnworth and Stephen L Casper further exemplify his impact on the semiconductor landscape. Duesman's work continues to inspire future advancements, ensuring a constant stream of innovation in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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